First, I've RTFMed the A3B7 and AU datasheets quite a bit, and then I read this post: "ATxmega256A3BU-xplained / clk_per selection" in this forum. While the code is not yet working correctly, it seems I'm getting closer.
I changed the CPU speed on my A3BU Xplained board to 32MHz and began seeing random bit patterns in the byte received by UART. The byte being transferred is always 0x2B.
NB: I'm feeding the UART data on the A3BU Xplained board via Jumper J1. The code does not utilize the bootloader.
After reading the above-stated post, I set conf_clock.h to:
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC32MHZ #define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_1 #define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_1
I am sending bits across a db9 serial cable from a linux box. The linux commands used are:
$ stty -F /dev/ttyS0 9600 cs8 -cstopb -parenb $ echo -ne '\x2b' > /dev/ttyS0
Now I consistently lose / drop bits:
0x2B sent, 0x0B received;
0x4B sent, 0x0B received;
0xFF sent, 0x1F received.
UART speed is set to 9600, parity N, data 8 bits, stop 1 bit.
In the startup code I've got:
ccp_write_io((uint8_t *)&CLK.CTRL, CLK_SCLKSEL_RC32M_gc);
but I'm not sure if that is needed. My apologies for being such a n00b on clocks!
If someone could please tell me what I'm doing wrong, I would truly appreciate it.
Thanks In Advance!