questions about upgrade and branch error message

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I'm getting error message from branch- command:
error: Relative branch out of reach
...any idea what's wrong?

And when I check upgrade from help I end up here:
http://www.formula1.com/ :shock:

Regards
heguli

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Perhaps the label you're trying to branch to is to far away (address-wise) for the instruction? How many bits is the relative address inside the branch instructions?

- Dean :twisted:

Make Atmel Studio better with my free extensions. Open source and feedback welcome!

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line: brsh shutflic ...gives the headache.

.include "C:\Program Files\Atmel\AVR Tools\AvrAssembler2\Appnotes\tn26def.inc"
.def	longtim	= r1
.def	verify	= r2
.def	horn	= r3
.def	edgedown= r4
.def	cnt1	= r5
.def	cnt2	= r6
.def	cnt3	= r7
.def	str_sreg= r8

.def	incode1	= r10
.def	incode2	= r11
.def	incode3 = r12

.def	interrpt= r14


.def	temp	= r16
.def	edgeup	= r17

.def	code1	= r18 ;**** security code 1 ****
.def	code2	= r19
.def	code3	= r20
.def	code4	= r21 ;**** security code 2 ****
.def	code5	= r22
.def	code6	= r23

.def	rem_reg	= r24 ;**** reminder register ****
.def	store	= r25




.org 0x00
rjmp init
.org 0x05	;Timer/Counter1 Overflow
rjmp tim1_OVF
.org 0x06	;Timer/Counter0 Overflow
rjmp tim0_OVF







init:
;********************************************************
;******************** INIT ******************************
;********************************************************


;**** INIT STACKPOINTER *************
ldi temp, RAMEND
out sp, temp


;**** CODES **************************
;**** from transmitter **********************************

;******* button 1 code 1100 1001 1011 1100 1000 1011 ****
ldi temp, 0xC9
mov code1, temp
ldi temp, 0xbc
mov code2, temp
ldi temp, 0x8B
mov code3, temp

;******* button 2 code 1100 0111 0101 1111 1001 0111 ****
ldi temp, 0xC7
mov code4, temp
ldi temp, 0x5f
mov code5, temp
ldi temp, 0x97
mov code6, temp




;**** A PORT OUT&INPUT ***************
ldi temp, 0xD7	; porta direction		=> 1101 0111
out DDRA, temp
ldi temp, 0x28	; pull-up PA3 and PA5	=> 0010 1000
out porta, temp

;**** B PORT OUT&INPUT ***************
ldi temp, 0x02	; portb direction => 0000 0010
out DDRB, temp	; PB1 used to teach mode
ldi temp, 0xFD	; pull-up to all except PB1
out portb, temp


;**** SREG ***************************
ldi temp, 0x80
out sreg, temp

;**** MCU ****************************
ldi temp, 0x00
out mcucr, temp




;*********** TIMERS ******************
ldi temp, 0x06	;enable interrupt to both tim
out timsk, temp


;**** TIMER0 *************************

;Table 31. Clock 0 Prescale Select
;CS02 CS01 CS00 Description
;0 0 0 Stop, the Timer/Counter0 is stopped
;0 0 1 CK
;0 1 0 CK/8
;0 1 1 CK/64
;1 0 0 CK/256
;1 0 1 CK/1024
;1 1 0 External Pin T0, falling edge
;1 1 1 External Pin T0, rising edge

ldi temp, 0x03	;CK/64 CK=16MHz TIC=250kHz
out tccr0, temp


;**** TIMER1 *************************

;Table 34. Timer/Counter1 Prescale Select
;CS13 CS12 CS11 CS10
;			Asynchronous Mode			Synchronous Mode
;0 0 0 0 Timer/Counter1 is stopped. Timer/Counter1 is stopped.
;0 0 0 1 PCK 						CK
;0 0 1 0 PCK/2						CK/2
;0 0 1 1 PCK/4 						CK/4
;0 1 0 0 PCK/8 						CK/8
;0 1 0 1 PCK/16 					CK/16
;0 1 1 0 PCK/32 					CK/32
;0 1 1 1 PCK/64 					CK/64
;1 0 0 0 PCK/128 					CK/128
;1 0 0 1 PCK/256 					CK/256
;1 0 1 0 PCK/512 					CK/512
;1 0 1 1 PCK/1024 					CK/1024
;1 1 0 0 PCK/2048 					CK/2048
;1 1 0 1 PCK/4096 					CK/4096
;1 1 1 0 PCK/8192 					CK/8192
;1 1 1 1 PCK/16384 					CK/16384


ldi temp, 0x00	;Timer/Counter Comparator A disconnected from output pin OC1A.
out tccr1a, temp

ldi temp, 0x09	;CK/256 TIC=62500Hz
out tccr1b, temp

ldi temp, 0x00	;PLL Control and Status Register disable=> tim1=normal use
out PLLCSR, temp



;******** USER REGS ******************
clr edgeup
ldi temp, 0x01	;at the beginning, set device to alarm off- mode
mov verify, temp



;******* READ USER EEPROM TO GENERAL PURPOSE REGISTER **********


ldi temp, 0x05 	; ADDRESS USER EEPROM1
out EEAR, temp
sbi	EECR, 0		; READ ENABLE
promld1:
sbic EECR, 0	; SKIP NEXT IF READ IS DONE
rjmp promld1
in store, EEDR ; MOVE DATA FROM EEDR TO STORE



;*****************************************************
;**************** END INIT ***************************
;*****************************************************



start:
;*****************************************************
;*****************************************************
;**************** START HERE *************************
;*****************************************************
;*****************************************************
;
; remember:
; porta direction	=> 1101 0111 PA3/5 in
; pull-up			=> 0010 1000 pull-up to PA3 and PA5
; 
; portb direction	=> 0000 0010
; pull-up to all except PB1
;
;*****************************************************

sbis pinb, 0		; PB0 low => jump to teach mode (miso isp1 to gnd isp6)
rcall teach


;******************************************************
;************* CHECK FOR A INCOMING CODE **************
;******************************************************

sbrc edgedown, 0	; disable incoming data until timer0 overflow => 
rjmp shutflic		; edgedown cleared by tim0_ovf
					; edgedown is related to: line 308

sbis pina,5			; data "1" coming...
rjmp add0inco		; jump: add "0" to incoming code


out tcnt0, store	; load timer0 with store

mov temp, cnt3		; cnt3 first bit to "1"
sbr temp, 1
mov cnt3, temp

lsl incode1			; rotate all incoming codes and inc incode with "1"
rol incode2
rol incode3
inc incode1

rjmp cdschec1

add0inco:			; add "0" to incode1 by rotating all register, but...  
sbrs cnt3, 1		; if cnt3's first bit is high then skip and rotate all
rjmp shutflic
lsl incode1			
rol incode2
rol incode3



cdschec1:
cpse incode1, code1	; compare security code with incoming code, skip if equal
rjmp cdschec2		; skip to cdschec2
cpse incode2, code2
rjmp cdschec2
cpse incode3, code3
rjmp cdschec2
ldi temp, 0x01
mov verify, temp	; load verify with 1
rjmp codmatch		; ...which marks that first button is pressed

cdschec2:
cpse incode1, code4
rjmp offyougo
cpse incode2, code5
rjmp offyougo
cpse incode3, code6
rjmp offyougo
ldi temp, 0x02		; load verify with 2 to mark that second button is pressed
mov verify, temp	; ...to mark that second button is pressed
rjmp codmatch


offyougo:
inc edgedown


;***************** END OF MONITORING *******************
;*******************************************************

shutflic:
mov temp, cnt1		; shutdown flicer led
cpi temp, 0x7a
brne skip
cbi porta, 6

skip:
;*******************************************************
;*************** SECURITY CODE MATCH *******************
;*******************************************************

codmatch:
mov temp, verify	; set alarm on / off
cpi temp, 0x02
breq armed


;************* SET ALARM OFF ***************************


in temp, porta		; release relays: K1=centerlock(PA0) K2=drive disable(PA1)
cbr temp, (1<<PA0)+(1<<PA1)
out porta, temp

in temp, porta		; disable incoming signal (through reley K4 and opto)
sbr temp, (1<<PA4)
out porta, temp




mov temp, horn		; horn = program counter
cpi temp, 0x01		; K3=alarm horn & lights(PA2)
brsh honkhorn		; clear counter1, cnt1 and set reley K3
ldi temp, 0x00		; inc horn register and disable this
out tcnt1, temp		; setting if already done before
clr cnt1
sbi porta, 2
inc horn

honkhorn:			; check if cnt1 has reach the 3d(250ms)
mov temp, horn
cpi temp, 0x02
brsh enough1

ldi temp, 0x3d		; after 250ms set relay off
cp cnt1, temp
brne enough1
cbi porta, 2
inc horn


enough1:			; wait 250ms and set horn and lights on again
ldi temp, 0x7a
cpse temp, cnt1
rjmp endsecmt


mov temp, horn
cpi temp, 0x02
brsh oncemore
ldi temp, 0x00
out tcnt1, temp
clr cnt1
sbi porta, 2
inc horn


oncemore:
mov temp, horn
cpi temp, 0x03
brsh enough2

ldi temp, 0x3d
cp cnt1, temp
brne enough2
cbi porta, 2
inc horn

enough2:

rjmp endsecmt


armed:
;************* SET ALARM ON ****************************
; info: 	flashing led is set on tim1 ovf.
; 			30 second has to pass before alarm is armed,
;			reason for this is a car doom light automation.
;			Light automation might earth door switch as long as on.
;			PA3 reads door switch via optocoupler, normally "0"
;			if door opens, PA3 rise to "1".


in temp, porta				;set relays: K1=centerlock(PA0) K2=drive disable(PA1) K3=alarm horn & lights(PA2)
sbr temp, (1<<PA0)+(1<<PA1)+(1<<PA2)
out porta, temp


mov cnt2, longtim			; store longtim content to cnt2
ldi temp, 0x1e				; load temp with 30(DEC) and... 
add cnt2, temp				; add to cnt2 making 30 sec. timer

cpse cnt2, longtim			; compare content of half second counter and cnt2
rjmp alarmon				; ...skip if equal, in other words 30 sec. has passed
cbi porta, 4				; release relay K4 and that way the alarm is set on

mov horn, longtim
ldi temp, 0x01
add horn, temp
cpse horn, longtim
rjmp alarmon
cbi porta, 2



alarmon:


endsecmt:
rjmp start


;*******************************************************
;************* TEACH MODE START ************************
;*******************************************************

teach:
;************* store first bit lenght ******************

cpi edgeup, 0x02	; teach mode ended-> jump to end_timer_init
breq end_timer_init


cpi edgeup, 0x01	; if teach is going on jump to shutflic
brsh shutflic

sbrs edgeup, 0		; skip if first bit is set in edgeup
sbis pinb, 2		; skip if bit is set in portb 2
rjmp waitlow
inc edgeup
ldi temp, 0x00		; clear timer0
out tcnt0, temp


waitlow:
sbrc edgeup, 0		; skip if bit is clear in edgeup, 0
sbic pina, 5		; skip if bit is clear in pina, 5
rjmp skip
in store, tcnt0		; store counter reading
com store			; sub 0xff - store => store


;************* store result to eeprom ****************
cli					; DISABLE GLOBAL INTERRUPT

againprom1:			; wait until eewe is zero and ready to write
sbic EECR, 1
rjmp againprom1
ldi temp, 0x05
out EEAR, temp		; EEPROM ADDRESS FOR STORE
out EEDR, store		; EEPROM DATA
sbi	EECR, 2			; WRITE ENABLE
sbi EECR, 1			; 	-II-

sei					; GLOBAL INTERRUPT ON

inc edgeup

end_timer_init:



sbi porta, 7		; teach mode has reach the end


ret

;*************************************************
;*************** END OF TEACH MODE ***************
;*************************************************



;*************************************************
;******** ALL INTERRUPT SERVICE START HERE *******
;*************************************************


;********* Timer/Counter0 Overflow ****************
tim0_OVF:	; clock source
in str_sreg, sreg	; store sreg
mov interrpt, temp	; store temp

inc cnt3			; tic on and off => full bit of data
clr edgedown

out tcnt0, store	; load timer with store
mov temp, interrpt	; restore temp
out sreg, str_sreg	; restore sreg

reti


;********* Timer/Counter1 Overflow ****************
tim1_OVF:
in str_sreg, sreg	; store sreg
mov interrpt, temp	; store temp

inc cnt1			; 16MHz/256/256/244=1,000576
mov temp, cnt1
cpi temp, 0xf4		;
brne off
clr cnt1
inc longtim			; 1sec/tic

off:
sbrc verify, 2		; if armed => set flashing led on pb6
sbi porta, 6		; shutflic: will shut down the led

mov temp, interrpt	; restore temp
out sreg, str_sreg	; restore sreg
reti

Regards
heguli

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The assembler datasheet has the following text for the BRSH instruction:

Quote:
Operation:
(i) If Rd ≥Rr (C = 0) then PC ← PC + k + 1, else PC ← PC + 1

Syntax: Operands: Program Counter:
(i) BRSH k -64 ≤ k ≤ +63 PC ← PC + k + 1
PC ← PC + 1, if condition is false

So you can't jump more than 64 instructions backwards or 63 instructions forwards. You might need to make a "trampoline"; a close label containing a proper RJMP to the correct location.

- Dean :twisted:

Make Atmel Studio better with my free extensions. Open source and feedback welcome!

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rjmp start 

shutflic_jmp:
rjmp shutflic

;******************************************************* 
;************* TEACH MODE START ************************ 
;******************************************************* 

teach: 
;************* store first bit lenght ****************** 

cpi edgeup, 0x02   ; teach mode ended-> jump to end_timer_init 
breq end_timer_init 


cpi edgeup, 0x01   ; if teach is going on jump to shutflic 
brsh shutflic_jmp

Try the above as Dean suggested, it happens all the time. You can also change the brsh test to

BRLO next
rjmp shutflic

next:

John Samperi

Ampertronics Pty. Ltd.

www.ampertronics.com.au

* Electronic Design * Custom Products * Contract Assembly

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You might need to make a "trampoline"
shutflic_jmp:

...guys, this programmers exercise works :)
Just wondering how did I miss that line from help :shock:
And I saw that very same line ...maybe I need to see someone, perhaps visit in optician could help :lol:

Regards
heguli