AD9833 problems.

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Hello.
Is it possible to program this device ( AD9833 ) with uP without spi?
And secound question: The only data to load into this device is reset 0x0100 and next data provided by AD9833 DDS Device Configuration Assistant and thats all or something else must be done?

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In answer to your first question, yes. You can use the 3-wire serial interface to this part by bit-banging a couple of pins on the uC. Why not use the uC hardware SPI?

In answer to your second question, it depends on what you want to achieve with this part! If you want to simulate the sound of a police siren, then the answer is yes - something else must be done.

Tom

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zoomcityzoom wrote:
In answer to your first question, yes. You can use the 3-wire serial interface to this part by bit-banging a couple of pins on the uC. Why not use the uC hardware SPI?

Can You say something more about that? or any link in internet?
Quote:

In answer to your second question, it depends on what you want to achieve with this part! If you want to simulate the sound of a police siren, then the answer is yes - something else must be done.
Tom

I want sin wave 1MHz so I must load

0x0100 0x2100 0x570A 428F A666 9999 C000 E000 2000

is that correct?

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Are you staying away from the AVR SPI because of inexperience with it or do you have another reason? Figure 3 on page 3 of the AD9833 data sheet shows a serial timing diagram. At first, I started to explain the serial interface, but really, the Functional Description on page 9 of the datasheet says it all.

Please look over and read the two pages referenced above and then post some specific questions. Once we work out the details of the interface, we can move on to the setup of the part itself.

Tom

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@label:

Not to discourage you, but if you are having a difficult time understanding the 3-wire serial interface between the uC and the AD9833, then you should prepare to spend many weeks reading the datasheet, and experimenting with the internal registers and their effect on the operation of the AD9833. This is a very complex part that requires much study to fully understand. There will be no shortcuts. If your needs are as simple and singular as requiring a 1 MHz sinusoidal output, then I suggest you look for a less complex solution.

Tom

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Specific question is that is it possible load data in some other way that using spi into AD9833. Can I connect this device to pins that dont have any special fuctions like shift register, clock and load this data? Somekind software spi can be done?
next specific question is:
Is that all what must be loaded into this device to run this device with 1Mhz frequency
0x0100 0x2100 0x570A 428F A666 9999 C000 E000 2000?

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Is this for a school assignment? When is it due?

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zoomcityzoom wrote:
Is this for a school assignment? When is it due?

Look at the calendar. Now there is no school at least in my country. :D

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Great! Please look at and read the following post.
https://www.avrfreaks.net/index.p...

Tom

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Use hardware SPI, don't forget to invert clock polarity (CPOL=1, see SPI section in the datasheet), AD9833 latches on clock going down. Provided that you have good MCLK source for the chip, you should have no problems whatsoever. And yes, the config word from the ADI tool can be loaded as is, although it's not necessary to load it completely. Read up.

If you only need 1MHz fixed frequency, never changing, why not just build an oscillator? You need an oscillator for DDS anyway, and not just an oscillator, you need a good one.

The Dark Boxes are coming.

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svofski wrote:
And yes, the config word from the ADI tool can be loaded as is, although it's not necessary to load it completely. Read up.

OK thx one more thing
this pga register is 16bit long and avrs have 8 bit long spi data register so example procedure can be presented as

clk CPOL=1
cbi(PORTX. FSYNC); //fsync down 
SPDR=((char) (0x2100>>8));
SPDR=((char) (0x2100));
//fsync can stay low?
SPDR=((char) (0x570A>>8));
SPDR=((char) (0x570A));

?

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I'm not sure what is "clk CPOL=1" and "cbi (PORTX.FSYNC)", that syntax is unknown to me. As for SPDR usage, that is correct. But you need to wait while 8-bits get pumped through between writes to SPDR register. In C it would look like this:

	while (!(SPSR & (1 << SPIF))) {};

You have to that after each write, or before doing a subsequent write to SPDR register. You can use interrupts as well, but that is usually not necessary.

I also like explicit casts with prior masking out MSB's when writing 16-bit words to 8-bit registers, just for a case. Compiler optimizes it away, but I'm calm that no rogue stuff gets sent anywhere.

The Dark Boxes are coming.

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label wrote:
Specific question is that is it possible load data in some other way that using spi into AD9833. Can I connect this device to pins that dont have any special fuctions like shift register, clock and load this data?

This is approximately the definition of SPI. The only thing missing is "circular", but in case of AD9833 which doesn't have data out, irrelevant.

The Dark Boxes are coming.

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To explain a bit further, when you look at the serial timing diagram on page 3 of the datasheet, you will see 3 different signals mentioned in the diagram. FSYNC, SCLK, and SDATA. Each one of the 3 signals is an input to the AD9833 which means they are an output from the uC. In general, timing issues aside, you may duplicate the action shown in the diagram by toggling port output pins high or low in the same sequence.

Following this, you'll see that SCLK must be high before FSYNC is driven low. Then, you'll see that the SDATA output must represent valid data (data bit you want to write) for a certain period of time before the SCLK output pin is driven low. You'll also see that SCLK has to stay low for minimum of time and then it must be high for a minimum of time. You'll also notice that after you clock the last bit (bit 0 of 16) into the part, that you may not set FSYNC high again for a period of time. Working through timing diagrams can be somewhat confusing the first few times. It does get easier! Note that as fast as the AVR runs, it would be no problem duplicating the timing diagram shown by toggling the output pins high/low as fast as you could from a 'C' or ASM program.

With the AD9833, you may use the AVR SPI to write 16-bits total by setting the FSYNC output pin LOW followed by two 8-bit transfers using the SPI, followed by setting the FSYNC output pin high again. As svofski said, you need to make sure the SPI bit transfer is complete before writing the next byte to the SPI transmit register.

Enjoy!

Tom

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I happen to do a project with same IC right at the moment, so I have some observations.. Interesting detail, when I set output to 1MHz exactly (well, it's all relative to MCLK), I get a pretty visible ladder that even 3-rd order elliptical (fc = ~3.5MHz, though) doesn't fix completely. A shift of +/- 1Hz and it's gone. What gives? Apparently it's a superimposition of MCLK and output frequency, feedthrough? It's pretty hard to check ALL possible frequencies, so I'm not sure if this effect is unique to this setting or not. I use 25MHz oscillator for MCLK.

Another interesting observation is that although this chip is specified for MCLK up to 25MHz, if your master clock has harmonics, it may easily pick up on the first one and work at 50MHz without any visible degradation. Maybe not a good idea to abuse that, but a possibility! Make sure your clock is clean.

The Dark Boxes are coming.

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Hello agian
Back to original question I found: this and some example using this with dataflash (see below).
pga.h

#define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit))
#define cbi(sfr, bit) (_SFR_BYTE(sfr) &= ~_BV(bit))
#define SPI_PORT PORTD
#define SPI_DIR DDRD
#define SPI_PIN PIND

// pseudo SPI pin definitions

#define SPI_CS PD6	// aka fsync
#define SPI_DATA PD4	// aka spi data
#define SPI_CLK PD5	// aka sclock

#define SET_DATAOUT sbi(SPI_PORT, SPI_DATA)
#define CLR_DATAOUT cbi(SPI_PORT, SPI_DATA)
#define PULSE_SPI_CLOCK {sbi(SPI_PORT, SPI_CLK); cbi(SPI_PORT, SPI_CLK);}

main file

#include 
#include 
#include "pga.h"
void init(void)
{
	SPI_DIR = 0x70;	// all pseudo spi pins output
	SPI_PORT =0x60;	// sclk and fsync high
}
void DataSend(uint16_t data)
{
	register uint16_t count = 16;
	cbi(SPI_PORT, SPI_CS);
	do
	{
		if( data & 0x8000)	//check every msb
		{
			SET_DATAOUT;
		}
		else
		{
			CLR_DATAOUT;
		}
		PULSE_SPI_CLOCK;
		data <<= 1;
	}while (--count);
	sbi(SPI_PORT, SPI_CLK);	//set sclk high at the end
	sbi(SPI_PORT, SPI_CS);	// set fsync high
}
int main()
{
	init();
	DataSend(0x0100);
	DataSend(0x2100);
	DataSend(0x570A);
	DataSend(0x428F);
	DataSend(0xA666);
	DataSend(0x9999);
	DataSend(0xC000);
	DataSend(0xE000);
	DataSend(0x2000);
	while(1);
}

Does it do exactly the same things as hardware spi and will works?

Attachment(s): 

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svofski wrote:
I happen to do a project with same IC right at the moment, so I have some observations.. Interesting detail, when I set output to 1MHz exactly (well, it's all relative to MCLK), I get a pretty visible ladder that even 3-rd order elliptical (fc = ~3.5MHz, though) doesn't fix completely. A shift of +/- 1Hz and it's gone. What gives? Apparently it's a superimposition of MCLK and output frequency, feedthrough? It's pretty hard to check ALL possible frequencies, so I'm not sure if this effect is unique to this setting or not. I use 25MHz oscillator for MCLK.

While I have not had the chance to work with this chip yet, I have read quite a bit about it... The online calculator on the AD website shows a warning message if you try and make the output frequency an integer divisor of the input frequency... Apparently any time this is the case, harmonics are increased. I do not know if there are other cases where heavy spurs are generated, but this is certainly a case to remember. If you really need a perfect 1MHz output, you might consider tuning your master clock off enough that a not-quite-integer divisor creates it :)

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@jtb: i looked again, but could find the warnings you mention. Where are they?

The Dark Boxes are coming.

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It's done no hardware spi is needed for programming this device.
pga.h

#define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit))
#define cbi(sfr, bit) (_SFR_BYTE(sfr) &= ~_BV(bit))
#define SPI_PORT PORTD
#define SPI_DIR DDRD
#define SPI_PIN PIND

// pseudo SPI pin definitions

#define SPI_CS PD6	// aka fsync
#define SPI_DATA PD4	// aka spi data
#define SPI_CLK PD5	// aka sclock

#define SET_DATAOUT sbi(SPI_PORT, SPI_DATA)
#define CLR_DATAOUT cbi(SPI_PORT, SPI_DATA)
#define PULSE_SPI_CLOCK {sbi(SPI_PORT, SPI_CLK); cbi(SPI_PORT, SPI_CLK);}
#include 

#include 
#include "pga.h"
void init(void)
{
	SPI_DIR = 0x70;	// all pseudo spi pins output
	SPI_PORT =0x60;	// sclk adn fsync high
}
void DataSend(uint16_t data)
{
	register uint16_t count = 16;
	cbi(SPI_PORT, SPI_CS);
	do
	{
		if( data & 0x8000)	//check every msb
		{
			SET_DATAOUT;
		}
		else
		{
			CLR_DATAOUT;
		}
		asm("nop");
		PULSE_SPI_CLOCK;
		data <<= 1;
	}while (--count);
	sbi(SPI_PORT, SPI_CLK);	//set sclk high
	sbi(SPI_PORT, SPI_CS);	// set fsync high
}

int main()
{
	init();
	DataSend(0x2100);
	DataSend(0x51B7);
	DataSend(0x4003);
	DataSend(0x91B7);
	DataSend(0x8003);
	DataSend(0xC000);
	DataSend(0xE000);
	DataSend(0x2000);
	while(1);

}

And it works perfect. :D

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Of course it's not needed. It's just convenient to use hardware SPI instead of wasting CPU time on emulation. Anyway, congratulations!

The Dark Boxes are coming.

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svofski wrote:
@jtb: i looked again, but could find the warnings you mention. Where are they?

Sorry for the slow response... I've been out of town :) I just checked, and the calculator for the 9833 doesn't include this warning - but the calculator for the 9951 (the actual chip I was looking at) does. I assume that the warning applies as well to the 9833, but perhaps I'm wrong... If you use the calculator for the 9951, it won't show the spurs in the graphical output - but it will include a caution note at the bottom of the page.

Sorry for the confusion.

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Thanks, I was worrying for a little. It seems that the artefact I'm observing is not particularly outstanding at 1MHz, but rather it's an effect of oscilloscope observation. At 1MHz main and 24MHz image freq, they seem to superimpose "nicely" so that the image is observable on the scope. Take another frequency, different image, and it's smeared across the sine and barely visible, if at all. Given that my scope is rated at 20MHz max, this result is not to be taken heavily. I think it's okay ;)

At really high sensitivity level on the scope, 1.8432MHz filtered sine from dds and same signal filtered through a crystal are different. Crystal-output is very crisp, filtered dds output still has some smearing.

The Dark Boxes are coming.