Bits of I/O registers as user’s flags

Go To Last Post
8 posts / 0 new
Author
Message
#1
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

I have ATmega8

I write my MCU firmware in assembly.

I usually use the bits of r25 and r24 as flags.

 

In my last program, UART protocol wasn’t used and I kept it inactive. I thought I could use the bits of its unused data register (UDR) also as flags. For these flags, the instructions SBI/CBI and SBIS/SBIC could be used. I noticed that the program didn’t run on  board as I expected (I don’t have an external emulator board). So I re-wrote the code using the bits of r23 as flags. The problem was solved. I concluded that UDR shouldn't be used as flags even if its UART protocol not in use.

 

Although I can test other inactive I/O registers as UBRRL and else, my question is:

 

Did anyone use the bits of unused I/O registers as flags?

 

Thank you.

 

Kerim

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Of course you can't use UDR. It is not one read/write register. It is two registers at the same address. One write only (outbound) and one read only (inbound). So you cannot expect to see bits you write there in a read-back. If you write the bits go off down the line never to be seen again.

 

For "old style" AVRs (those with just 64 SFRs and no GPIORn registers) I often find the TWAR register is a good place to put 8 bit flags. That really is a completely "normal" read/write register and works well for the job (only don't use TWI!).

 

I imagine UBRRL would make another good candidate for this too. (perhaps TWBR as well?)

 

EDIT: of course the PORT and DDR register would be another possibility but you'd want to be pretty sure the pins weren't connected to anything in the outside world that might be perturbed by being driven or even just having pull-ups enabled. One possible advantage of this would be if you were to wire 8 LEDs to the pins you could actually use that to debug your bit flags as the thing was running! :-)

 

As I look at the one page register summary in the mega8 datasheet I imagine EEARL is a possibility - but you would have to be certain not to invoke any EEPROM activity.

 

Actually, if you didn't start a timer I guess the TCNTs are all possibles too.

Last Edited: Wed. Aug 10, 2016 - 01:19 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

KerimF wrote:

I concluded that UDR shouldn't be used as flags even if its UART protocol not in use.

 

If you look at Figure 61 in the datasheet you'll see why.

#1 This forum helps those that help themselves

#2 All grounds are not created equal

#3 How have you proved that your chip is running at xxMHz?

#4 "If you think you need floating point to solve the problem then you don't understand the problem. If you really do need floating point then you have a problem you do not understand." - Heater's ex-boss

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Thank you, clawson, for your prompt reply and your explanation.

 

So far, TWAR and UBRRL are good for flags if their protocols are unused and inactive. 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Hi Clawson,

 

I am afraid that for ATmega8, the instructions SBI/CBI and SBIS/SBIC could be used for the first 32 I/O register only.

 

Kerim

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Not as "clean" as a whole register, but there should be a number of individual bits available here and there.  For example, if SPI isn't being used and SPE not set, then e.g CPOL DORD CPHA SPR0 SPR1 should be safe.

 

The newer generation Mega88 family has GPIOR registers.  In practice, of somewhat limited use as only GPIOR0 is "down low" in reach of SBI and friends.  And the sparse layout of the I/O map wastes a lot of the low address space.

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

 

KerimF wrote:
could be used for the first 32 I/O register only.

Ah, of course. If you aren't willing to live with RMWs involving IN/OUT then I guess that's why I used TWAR myself. Of the registers between 0x00 and 0x1F in IO range of SBI/CBI I guess the candidates narrow down to:

 

TWBR

TWAR

UBRRL

DDRD

PORTD

DDRB

PORTB

EEARL

 

If you are after full 8 bit registers.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

clawson wrote:

 

KerimF wrote:could be used for the first 32 I/O register only.

Ah, of course. If you aren't willing to live with RMWs involving IN/OUT then I guess that's why I used TWAR myself. Of the registers between 0x00 and 0x1F in IO range of SBI/CBI I guess the candidates narrow down to:

 

TWBR

TWAR

UBRRL

DDRD

PORTD

DDRB

PORTB

EEARL

 

If you are after full 8 bit registers.

 

Thank you for the list.

I guess the possibility to have extra separated flags is also a bonus.