While digging through the ATmega328PB datasheet (rev C) some questions came up that i hope someone here might be able to answer:
- Power Reduction Register:
Looking at "14.11. Register Description" it seems that Timer3 and Timer4 as well as TWI1 can not be powered down.
I wonder if there actually is a second Power Reduction Register that is just missing in the datasheet?
- Timer Prescaler
Although "21. Timer/Counter0 and Timer/Counter1,3,4 Prescalers" states that Timers 0, 1, 3 and 4 share the same prescaler,
the description of "Bit 0 – PSRSYNC: Prescaler Reset" in "21.4.1. General Timer/Counter Control Register" only mentions Timer 0 and 1.
Can anyone confirm that PSRSYNC actually also affects the prescaler of Timer 3 and 4?