AVR Freaks

Always got accused as a troller....that's ok....fine with me...

I 'm trying now with :

My board Ip is 10.0.0.20
 

Is this a clue ?

26    1.737808    QuantaCo_71:47:e0    Broadcast    ARP    42    Who has 184.86.223.195? Tell 10.0.0.2 ....is it pointing to my board ?

I tried to debug here :

uint8_t enc28j60Read(uint8_t address)
{
        // set the bank
        enc28j60SetBank(address);
        // do the read
        return enc28j60ReadOp(ENC28J60_READ_CTRL_REG, address);
}

void enc28j60Write(uint8_t address, uint8_t data)
{
        // set the bank
        enc28j60SetBank(address);
        // do the write
        enc28j60WriteOp(ENC28J60_WRITE_CTRL_REG, address, data);
}

    char mac_0[10];
    uint8_t mac_0_int;

enc28j60Write(MAADR0, macaddr[5]);
//debug MAC0 vlue
	mac_0_int = enc28j60Read(MAADR0);
	sprintf(mac_0,"%.2d",mac_0_int);
	usart_pstr("MAC ADDR 0: \n");
	usart_pstr(mac_0); 

uint8_t enc28j60ReadOp(uint8_t op, uint8_t address)
{
        ENC28J60_CONTROL_CS_L;
        // issue read command
        SPDR = op | (address & ADDR_MASK);
        waitspi();
        // read data
        SPDR = 0x00;
        waitspi();
        // do dummy read if needed (for mac and mii, see datasheet page 29)
        if(address & 0x80)
        {
                SPDR = 0x00;
                waitspi();
        }
        // release CS
        ENC28J60_CONTROL_CS_H;
        return(SPDR);
}

void enc28j60WriteOp(uint8_t op, uint8_t address, uint8_t data)
{
        ENC28J60_CONTROL_CS_L;
        // issue write command
        SPDR = op | (address & ADDR_MASK);
        waitspi();
        // write data
        SPDR = data;
        waitspi();
        ENC28J60_CONTROL_CS_H;
}

Result :

ENC28J60 Test application!

ENC28J60 Initialization finished!
MAC ADDR 0:
00

ENC28J60 init!

BEFORE WHILE

Why MAC  = 00 ?

Init code :

// structure to allow bit field operations, name conversions: PORTA.0 -> PORT_A.b0  PORTB.7 -> PORT_B.b7
typedef struct{ uint8_t b0:1;
	uint8_t b1:1;
	uint8_t b2:1;
	uint8_t b3:1;
	uint8_t b4:1;
	uint8_t b5:1;
	uint8_t b6:1;
uint8_t b7:1; } bits;

// define all the ports of your microcontroller, add more ports depending on the available mcu ports
#define PORT_B (* (volatile bits *) &PORTB)
#define PIN_D (* (volatile bits *) &PIND)
#define DDR_B (* (volatile bits *) &DDRB)
#define PORT_E (* (volatile bits *) &PORTE)

#define ENC28J60_CONTROL_PORT	PORTB
#define ENC28J60_CONTROL_DDR	DDRB
#define ENC28J60_CONTROL_CS		PORT_B.b4
#define ENC28J60_CONTROL_CS_L 	PORT_B.b4=0x00
#define ENC28J60_CONTROL_CS_H 	PORT_B.b4=0x01

void enc28j60Init(uint8_t* macaddr)
{
	char mac_0[10];
	uint8_t mac_0_int;
	// initialize I/O

	    // ss as output:
	ENC28J60_CONTROL_DDR |= 1<<ENC28J60_CONTROL_CS;

    DDR_B.b4 = 1;

 	ENC28J60_CONTROL_CS_H; // ss=0

	DDRB  |= 1<<PB1 | 1<<PB2; // mosi, sck output

	cbi(DDRB,PINB3); // MISO is input
    
	    //
        cbi(PORTB,PB1); // MOSI low
        cbi(PORTB,PB2); // SCK low
	//
	// ³õʼ»¯ SPI
	// Ö÷»úģʽ£¬Fosc ¶þ·ÖƵ
	//16MHz SPI start
	        SPCR = (1<<SPE)|(1<<MSTR);
            SPSR |= (1<<SPI2X); //  fck/2 * 2 = 8Mhz x2 =  sck = 16Mhz
		// perform system reset
	enc28j60WriteOp(ENC28J60_SOFT_RESET, 0, ENC28J60_SOFT_RESET);
	
	_delay_ms(50);
	
	// check CLKRDY bit to see if reset is complete
        // The CLKRDY does not work. See Rev. B4 Silicon Errata point. Just wait.
	//while(!(enc28j60Read(ESTAT) & ESTAT_CLKRDY));
	// do bank 0 stuff
	// ³õʼ»¯½ÓÊÕ»º³å
	// 16-bit transfers, must write low byte first
	// set receive buffer start address
	
	//Test CS LOW by Riko 21 May 2015
	//ENC28J60_CONTROL_CS_L; // ss=0
	NextPacketPtr = RXSTART_INIT;
        // Rx start
	enc28j60Write(ERXSTL, RXSTART_INIT&0xFF);
	enc28j60Write(ERXSTH, RXSTART_INIT>>8);
	// set receive pointer address
	enc28j60Write(ERXRDPTL, RXSTART_INIT&0xFF);
	enc28j60Write(ERXRDPTH, RXSTART_INIT>>8);
	// RX end
	enc28j60Write(ERXNDL, RXSTOP_INIT&0xFF);
	enc28j60Write(ERXNDH, RXSTOP_INIT>>8);
	// TX start
	enc28j60Write(ETXSTL, TXSTART_INIT&0xFF);
	enc28j60Write(ETXSTH, TXSTART_INIT>>8);
	// TX end
	enc28j60Write(ETXNDL, TXSTOP_INIT&0xFF);
	enc28j60Write(ETXNDH, TXSTOP_INIT>>8);
	// do bank 1 stuff, packet filter:
        // For broadcast packets we allow only ARP packtets
        // All other packets should be unicast only for our mac (MAADR)
        //
        // The pattern to match on is therefore
        // Type     ETH.DST
        // ARP      BROADCAST
        // 06 08 -- ff ff ff ff ff ff -> ip checksum for theses bytes=f7f9
        // in binary these poitions are:11 0000 0011 1111
        // This is hex 303F->EPMM0=0x3f,EPMM1=0x30
	enc28j60Write(ERXFCON, ERXFCON_UCEN|ERXFCON_CRCEN|ERXFCON_PMEN);
	enc28j60Write(EPMM0, 0x3f);
	enc28j60Write(EPMM1, 0x30);
	enc28j60Write(EPMCSL, 0xf9);
	enc28j60Write(EPMCSH, 0xf7);
        //
        //
	// do bank 2 stuff
	// enable MAC receive
	enc28j60Write(MACON1, MACON1_MARXEN|MACON1_TXPAUS|MACON1_RXPAUS);
	// bring MAC out of reset
	enc28j60Write(MACON2, 0x00);
	// enable automatic padding to 60bytes and CRC operations
	enc28j60WriteOp(ENC28J60_BIT_FIELD_SET, MACON3, MACON3_PADCFG0|MACON3_TXCRCEN|MACON3_FRMLNEN);
	// set inter-frame gap (non-back-to-back)
	enc28j60Write(MAIPGL, 0x12);
	enc28j60Write(MAIPGH, 0x0C);
	// set inter-frame gap (back-to-back)
	enc28j60Write(MABBIPG, 0x12);
	// Set the maximum packet size which the controller will accept
        // Do not send packets longer than MAX_FRAMELEN:
	enc28j60Write(MAMXFLL, MAX_FRAMELEN&0xFF);	
	enc28j60Write(MAMXFLH, MAX_FRAMELEN>>8);
	// do bank 3 stuff
        // write MAC address
        // NOTE: MAC address in ENC28J60 is byte-backward
        enc28j60Write(MAADR5, macaddr[0]);
        enc28j60Write(MAADR4, macaddr[1]);
        enc28j60Write(MAADR3, macaddr[2]);
        enc28j60Write(MAADR2, macaddr[3]);
        enc28j60Write(MAADR1, macaddr[4]);
        enc28j60Write(MAADR0, macaddr[5]);
	// no loopback of transmitted frames
	enc28j60PhyWrite(PHCON2, PHCON2_HDLDIS);
	// switch to bank 0
	enc28j60SetBank(ECON1);
	// enable interrutps
	enc28j60WriteOp(ENC28J60_BIT_FIELD_SET, EIE, EIE_INTIE|EIE_PKTIE);
	// enable packet reception
	enc28j60WriteOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN);
	usart_pstr("ENC28J60 Initialization finished! \n");
	//debug MAC0 vlue
	mac_0_int = enc28j60Read(MAADR0);
	sprintf(mac_0,"%.2d",mac_0_int);
	usart_pstr("MAC ADDR 0: \n");
	usart_pstr(mac_0);
}

Any knowledge ?

Thanks for concerning.....

Wht should I give attention at errata? Tx

That one? Probably my chip has different version? Let me see

http://ww1.microchip.com/downloa...

How do I know which chip I have with which errata ?

Thanks

and from logic analyzer....the output is not good...I do not understand....

I'm using a library and it was working before....that's why I have a question ??? Is the library stable or just another C experiment ??

Is it because I share SPI port with some chips ? or between 3.3V and 5V ?

Have a look on logic analyzer.....very bad....that's the chip talking to me....not in any languages only 0 and 1.....not C....

So how do u suggest me writing the definition? Thanks

@kartkan Good luck for ur work... may I know... what series do u use? Mega ..sam?

I got something on SPI but I haven't tested for complete REVID....

DDRB  = 0xB7;

I read from :

http://easyelectronics.ru/img/Mo...

page 3....

oo....my fastest SPI on atmega is 8MHz....can I overclock it to 25MHz on its crystal ?

1. Module: MAC Interface

When the SPI clock from the host microcontroller

is run at frequencies of less than 8 MHz, reading or

writing to the MAC registers may be unreliable.

What I DO NOT understand.....it was working ok without a problem, now with the same board and the same code...I DO NOT change anything and IT IS NOT WORKING....really ridicilus for me...

despite of I"m capable on making it  or not.... you don't have to judge like you're my MASTER or my TEACHER or already VERY GOOD IN C .....are you my MASTER ?? WHAT'S THE POINT I'M JOINING THE FORUM IF I CAN NOT ASK.... ?? that's really strange for me....

THAT IS WHY, I HAVE A QUESTION....if you have the situation like this....what do you have in your mind ?

I get 8MHz on SPI, get response from EN28J60...I keep trying....