OK, it's time for me to eat ash.
I just can't get this darn chip to talk to me by bit-bashing.
I have two routines, one sends a byte, low bit first, one receives a byte the same way.
To start the clock you need to send two pairs of bytes:
0x8E, 0x00 to write enable the registers
080, 0x00 sets seconds to zero and starts the clock
You can then keep sending 0x81 and read back to see if the clock has started, as the reply byte should increment by one every second, rolling over after 59.
This is the basic structure of the write - really just to prove I am setting RST/CE then clearing it after the write:
;RTC Macros .macro RTCRSTH sbi PORTB,RTCRST rcall FOURTEEN_NOPS .endmacro .macro RTCRSTL cbi PORTB,RTCRST RCALL FOURTEEN_NOPS .endmacro .MACRO RTC_WRITE_TWO_BYTES RTCRSTH ldi temp,@0 rcall RTC_WRITE_BYTE rcall FOURTEEN_NOPS ldi temp,@1 rcall RTC_WRITE_BYTE RTCRSTL .endmacro
Now this is what the timing diagram looks like:
And this is what it looks like on the scope, bearing in mind bits are sent low bit first:
To cut to the chase, a receive looks exactly the same, except the data line is set as an input after the written byte. Putting the scope on during a read shows no signal coming back from the module.
I don't think it is a coding issue as (1) I can see all the correct signals going to the module and (2) as I'm using the scope to check it doesn't matter if my reading code is duff as I would see the return byte.
I have exhausted every avenue I can think of and am left with three possibilities (1) the chip is duff (2) there's a glitch between the two writes which appears to be linked to setting the data line as an output in the data direction register or (3) something I'm too stupid to think of.