ATmega64/128: Bug in simulator with UCSR0C and UBRR0H

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In the simulator, when the UCSR0C register is changed, the UBRR0H register is also changed to the same value (at least as far as the bits that are available in UBRR0H). This happens on both the mega64 and the mega128 (and possibly others).

Regards,
Steve A.

The Board helps those that help themselves.

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Is it a bug if it is listed in the Simulator Known Issues section in the AVRStudio help file?

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Since the simulator does not behave like the chip that it is simulating, then yes, it is a bug. It is just a known bug.

Regards,
Steve A.

The Board helps those that help themselves.

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Steve,

But the simulator is deficient in MANY ways not just this one. The first step for anyone using the simulator is to visit the Studio help and read the "Known Issues" section. For the Mega128 specifically it documents:

Quote:
When writing to UCSRnC, the value will be copied to UBRRnH unless bit 7 is set. This behaviour should not happen on devices that have separate locations for these registers. A workaround is to write UBRRnH after UCSRnC.

The JTD bit in the MCUCSR register must be set to the desired value twice within four cycles to change its value. In the simulator the JTD bit can be written directly.

The ADC noise reduction function is not supported. Setting the ADIF flag will not wake the CPU from sleep mode.

But there are LOADS of generic limitations too - listed above the device specific known issues.

A bug for me is something that is documented to work but then doesn't - but if the simulator author says "by the way this simulator has the following limitations..." then I wouldn't class those as bugs myself.

Cliff