SPI master with multiple slaves - elegantly handling the CS pins?

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Say i have an AVR that is acting as a master on an Spi bus with multiple, identical slave devices (not important what those devices actually are).

 

Generally, to talk at a slave device, the master would pull the appropriate CS pin low, then send out the necessary data, then let go of the CS pin.

 

Up till now, i have the bit of code handling the CS pin state separate from the bit of code driving the data.

 

 

But, i'm looking at an application that has multiple slaves of the same type, using a different CS pin for each, and that pin could be on any of the AVRs ports, and not necessarily in any logical order.

 

So, the question:  How to handle the CS pin state selection in an elegant way?

 

I wondered about having an array that holds a list of pointers to the appropriate pin on the appropriate port.  So to talk to device zero, you'd call "Call_device_(0)" and position zero in the array would then be looked up and set low etc?

 

Is there a more elegant way of doing this?  (for one or two devices, some inline code or macros would surffice, but it gets messy with say 5 or more slaves?)

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In the general case, the use of a port:bit 'pointer' is the most elegant solution. In some circumstances, you may be able to dedicate a sequential range of pins on a single port to the purpose, where a simple bit shift operation will suffice. But, due to considerations of pcb layout and alternate pin functions, the probability of success diminishes exponentially with the number of SPI devices. 

 

Even if by some miracle you can dedicate an entire port to select SPI slaves, you may also want to consider that in a future revision, yet another SPI device may be added. You may wind up with more than 8 devices. In that case, the port:pin pointer method is the only logical choice.

 

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I would say the chip used is important. Look at this: https://www.maximintegrated.com/... and read the section on daisy chaining to eliminate the CS problem entirely.