The SAMD10 examples that come with ASF currently use the default 8MHz internal clock.\
I thought I should run it at the max 48MHz rate. After all, that's one reason why you use an ARM, right?
Apparently, for an ASF-based program, the preferred way to configure the chip/board clocks is to modify the conf_clocks.h file, which is include and acted on by the ASF clock_init() function. OK...
Is conf_clocks.h DOCUMENTED anywhere? It's a lot more complex than I would have liked. The ASF documentation describes the functions that clock_init() will end up calling, but not (as far as I found) how conf_clocks.h is laid out. :-(
Why, oh why, is ARM clock configuration so complex and so poorly "abstracted" by vendor libraries? In an environment where they seem to think that coders need a function "port_pin_set_output_level" instead of "PORTPINNAME = n", why can't I just say that I have an 8M crystal and want to run at 48MHz, without having to learn about the details of whether I want a PLL or an FLL, multipliers, clock source choices, and so on? (And it's not just Atmel!)
Aside from that not being a legal configuration, apparently. Max input frequency for the FLL is 33kHz, and for the PLL is 2MHz, so it looks like I can't generate 48MHz from an 8MHz crystal. That seems ... annoying. And it took me a long time to figure that out, considering that there is clock_config_check.h that is supposed to check the validity of conf_clocks.h
(I guess it's included from chip-independent code (sam0, anyway), so maybe it doesn't know about these limits? Not very useful :-( )
Now, the D10 Xplained mini doesn't actually have an 8MHz crystal; it has an 8MHz clcok from the mdebug chip feeding into Xin. I guess that's useless unless I want to run at 8MHz? Sigh. (no, wait. Can I divide the external clock before it gets to the input of the FLL?)
Now, I'm still confused about how, if I configure one GCLK as the reference frequency for the FLL, how I manage to get the cpu and all the peripherals/buses to use a different GCLK?
Perhaps I'm just confused about the whole clock system for the SAMD; is there a document somewhere that describes it ... differently ... than the datasheet?