XMEGA ADC Reference voltage range

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Hello,

 

the ADC Vref is specified as Vcca-0.6V.        I read somewhere that the -0.6V limitation is due to the voltage being shared with the DAC.

 

Has anybody tried a higher voltage like 3.3V at 3.3V supply?

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It sounds more like headroom for the sample-and-hold circuit or something like that to me. It might work at higher voltages, but you couldn't rely on it meeting the specs for linearity etc. If you try it let us know how you get on.

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Could be the sample hold.    In this case linearity would not matter a bit above 2.7V.

Or they tweaked it to get the input range below 0 (really useful feature, in my 0..3.3V designs I meet voltages below 0 all the time).   

In another thread somebody mentioned the DAC output amp could not reach that high, hence the limit.

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Well the sample-and-hold amp might have the same limitation, or at least get non-linear enough to make 12 bit resolution pointless. Try it and see, it might be fine for say 10 bits.

 

The zero crossing thing has its uses, but if you don't want it just use differential mode with the negative input set to GND. Again, when you get up to 12 bits you probably want an external GND reference anyway.

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Hi, all,

 

since this was a question without any answer, I performed ADC test. VCC = 3.3VDC. Instead of regular 2.5V reference I used 3.0V Result is on the graph.

Conclusion: do not use reference higher than (VCC-0.6). Something inside saturates.

Last Edited: Tue. Jul 7, 2015 - 02:05 PM
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Thank you very much ccrtay. That is a very useful experiment. It looks like you could probably connect AREF to VCC and just use the lower part of the range where the ADC is linear, if you wanted to save money/space and couldn't use the internal 1V reference for some reason.

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Hi all,

 

did the same test this morning with the same result.    The reference voltage is clamped at Vdd-0.6.    Together with the 190LSB negative offset, the excessive 32kHz oscillator current and the recent price hikes that pretty much renders the IC unsuitable for our application.  Xmega r.i.p.

 

Regards,

 

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Excessive 32KHz oscilaltor currents? I'm running one for RTC timing and seeing less than 1uA going into the MCU.

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Added pink line, which is ideal transfer curve calculated for reference voltage of 2850 mV.

VCC = 3.3V, Vref = 3.0V, sample rate 1kHz, differential signed measurement.

 

I don't see any 190 offset, I would say current consumption is less than NXP Cortex-M3 running at same speed with same functionality (the only I have so I can compare). Of course finally it is your decision to use or not to use. I am quite satisfied with these chips.

 

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You don't see an offset because you are using the ADC in differential mode. If you use it in single ended mode there is a small offset to allow measuring small negative voltages. It's not a bug, it's a feature, and it's very easy to avoid by using the ADC in differential mode. That's how it was designed, it just confused a lot of people who were used to the old 10 bit ADCs on the MEGA range.

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mojo-chan wrote:

It looks like you could probably connect AREF to VCC and just use the lower part of the range where the ADC is linear

 

As my experiment showed, real clamping level was 2.85V, and only about 40LSB were inaccurate at high side. Definetely, this level will float with VCC and temperature, as well as from chip to chip.  If you are not making precise measurement, or you can calibrate every device then probably you are right.

Last Edited: Wed. Jul 8, 2015 - 06:52 PM
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While we are on this subject, what about the 0.5x gain setting? Can you measure higher than the reference voltage with it? For example, say you used the internal 1V reference, could you measure a 1.5V signal with the gain set to 0.5 and a 3V VCC supply?

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You don't see an offset because you are using the ADC in differential mode. 

Well, yes and no. You could also use single ended in signed mode, this way the negative input is the ground.

Have a nice day,
Kraal