I needed to solve a problem in developing my Crazy Clock firmware, and I think it's a useful enough technique that I'll describe it in case anyone else runs across a similar problem.
The circuit was designed with a 4 MHz crystal (the current version uses a 32.768 kHz one, but the principle remains the same), but to reduce power consumption, I set the prescaler to divide by 128, so the system clock is 31.25 kHz. What I wanted to have happen was for the controller to sleep most of the time, but a timer interrupt to wake it up at 10 Hz. So timer 0 is set up with a divide-by-64 prescaler and CTC mode. But the counting frequency as a result is 488.28125. In other words, the counter needs to count to 48.8828125 to result in a 10 Hz interrupt. Obviously, fractional counts aren't going to work.
I happened to remember some work I had done a long time ago on hardware PLL circuits. Some of the sophisticated ones had a special bifurcated counting system that would count to one value, then toggle one output, then continue counting to another value and then pass the resulting frequency to the phase comparator. The intermediate output was designed to go to a divide-by-n / divide-by-n-plus-one prescaler. The concept was that the intermediate count allows you to define a fractional divisor.
So what is 48.828125 expressed as a fraction? Turns out that's 48 + 53/64. What does that do for us? Well, if we set the counter to count to 49 for 53 cycles, then to 48 for 11 (64 - 53) cycles, that's 3125 cycles total. Recall that the clock frequency is 3125 times 10 times 64. Q.E.D.
So what you wind up with is an interrupt handler that needs to keep track of which interrupt within a 64 interrupt cycle is happening. On the first, you set the CTC register to 48 (recall that it's zero-based AND inclusive, so that means 49 counts), and on the 54th, set it to 47. The interrupts will happen nominally at 10 Hz. Some intervals will be one cycle shorter, of course. That works out to be 2.048 msec. For my application, that was insignificant, but it's something to consider.
I had other applications for this technique within the same project. Some of the firmware loads call for ticking a clock very slightly faster or slower - for example, for Martian Sol time, Sidereal time or lunar tidal time. This same fractional counting technique is used to add or subtract tenths-of-a-second between ticks to effect this change.
EDIT: 32.768 kHz crystal, not 32 MHz.
