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 Posted: Jul 30, 2010 - 05:32 PM |
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Joined: Feb 23, 2005
Posts: 102
Location: Salt Lake City, Utah
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:PCB Layout added later in thread:
My process used to be going straight from the breadboard to PCB layout using ExpressPCB. Attached is my second schematic created using EAGLE and I'm looking for some feedback/proofing before I get the board layout finished and sent off.
This board is basically the brains for a programmable RGB strand. Each RGB LED is controlled by an ATTiny25 and receives data from this board via MOSI/SCK. It can either generate frame-buffer data from built in animations, or it can receive color info over the RS485 link.
Thanks freaks!  |
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Last edited by mhatter on Aug 26, 2010 - 06:30 PM; edited 2 times in total
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Posted: Jul 30, 2010 - 05:34 PM |
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Joined: Jul 18, 2005
Posts: 34381
Location: (using avr-gcc in) Finchingfield, Essex, England
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| I'll move this to General Electronics as you'll get more "eyeballs" there (and this "Moved" entry will still be visible in AVR Forum so you effectively get the thread in two fora) |
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Posted: Jul 30, 2010 - 06:21 PM |
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Joined: Dec 11, 2007
Posts: 3139
Location: Cleveland, OH
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Sounds like a fun project.
AVR042 is the Atmel Hardware Layout Application Note. It discusses the value of the resistor on the Reset pin, and the inclusion of a cap to ground, (if you are not using debug wire). (Old Ap Note: IIRC a cap is not used on XMega resets, either, but that is another topic). It is also the de-facto standard reference for the ISP programming header, (shown as a Top Down view in the application note).
The 1uF caps on the power pins are good, but you should also have 0.1 uF caps by-passing the power pins. On the layout make sure that they are as close to the uC pins as possible.
D1 will protect the circuit from a reverse polarity applied power supply, it there is a fuse / circuit breaker in the power supply. Some bench supplies would simply fry the diode, then the circuit. Some wall warts have an internal fuse. If it blows you throw out the wall wart, (not replaceable).
An option is to put D1 is series with the V+ line. This provides non-destructive protection against a reverse polarity power supply application. Vin then needs to be about 0.7 V higher than the minimum Vin for the voltage regulator, plus whatever safety margin you want.
1 K for 5V series LEDs resistors is a bit high, unless you have the newer "high efficiency" leds. Old generic LEDs will glow very dimly with 1 K ohms, 470 is a nice value.
I'll let others commend on R6 & R7, and the tranceiver, not my area.
Check the voltage regulator's data sheet to make sure it does not require any other caps on either the input or the output.
Good luck with your project. Post a picture when you have it up and running!
JC |
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Posted: Jul 30, 2010 - 07:58 PM |
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Joined: May 21, 2003
Posts: 175
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R1 should be 120 ohms for RS485. You may want to take a look over at doityourselfchristmas.com - there are a few people over there who have tackled similar projects.
/mike |
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Posted: Jul 30, 2010 - 11:45 PM |
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Joined: Mar 28, 2001
Posts: 13030
Location: Sydney, Australia (Gum trees, Koalas and Kangaroos, No Edelweiss)
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Quote:
you'll get more "eyeballs" there
Just one, currently, in my case... 
I would make provisions for 2 x 560R resistors on the RS485 line for biasing, 1 from A to VCC and 1 from B to GND.
Don't have to use them if they exist on another board but at least they are there if required. |
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John Samperi
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* Electronic Design * Custom Products * Contract Assembly
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Posted: Jul 31, 2010 - 04:51 AM |
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Joined: May 04, 2007
Posts: 842
Location: Geelong Australia, Home of the "Cats"
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For the input protection you have a diode crowbar giving you reverse power protection, thus you must use an external fuse to avoid blowing up the power supply, the crowbar diode & possibly prevent a fire.
If the input voltage is sufficiently high enough to allow for one diode voltage drop to use a series diode especially if an unfused wall wart is to be used. |
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Posted: Jul 31, 2010 - 04:56 AM |
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Joined: Jul 02, 2005
Posts: 2632
Location: Melbourne, Australia
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Call me clueless if you wish ... but for all of my products, especially where the client supplies the wallwart, I ALWAYS use a full bridge rectifier. They can connect AC/DC reverse the dam thing whatever ... I sleep easy.
Cheers,
Ross |
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ValuSoft
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Posted: Aug 01, 2010 - 01:58 PM |
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Joined: Dec 30, 2004
Posts: 4401
Location: Melbourne,Australia
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| I'd also suggest putting LEDs on the rxd and txd signals rather than on the bus direction. My 'standard' is a red on txd and green on rxd. Makes debugging much easier. |
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Posted: Aug 01, 2010 - 03:32 PM |
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Joined: Sep 04, 2005
Posts: 131
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If you're too cheap for ross' polarity protection, you can also do it like this:
It will save you a lot of fuses.
ps. thin PCB traces are fuses too  |
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Posted: Aug 02, 2010 - 03:16 AM |
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Joined: Feb 23, 2005
Posts: 102
Location: Salt Lake City, Utah
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Thanks for all of the suggestions!
I've made the following changes to the schematic:
1) Moved the diode inline; I can live with the voltage drop
2) Added .1uF caps to each power pin on the uC
3) Changed LED resistors to 470; tested this on the breadboard and I prefer them a little brighter
4) Changed the resistor between A-B to 120ohm
5) Changed LEDs on the differential transceiver to rx and tx
R6 and R7 were picked based on what the scope showed. 680ohm cleaned up the wave nicely with the wire I am driving.
A full bridge would be nice but I'm trying to save board space and a single diode inline seems like it will do the trick.
Quote:
I would make provisions for 2 x 560R resistors on the RS485 line for biasing, 1 from A to VCC and 1 from B to GND.
I'll only ever do point-to-point with this board and its 'master'. What is the best way to pick the biasing resistors?
New schematic attached.
Thanks again! |
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Posted: Aug 02, 2010 - 03:37 AM |
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Joined: Dec 30, 2004
Posts: 4401
Location: Melbourne,Australia
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| Remember that uart comms idles in the '1' state, therefore the leds should go between the signal and VCC. The leds will then flash when there is data being received/sent. |
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Posted: Aug 02, 2010 - 03:42 AM |
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Joined: Mar 28, 2001
Posts: 13030
Location: Sydney, Australia (Gum trees, Koalas and Kangaroos, No Edelweiss)
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Quote:
I'll only ever do point-to-point with this board and its 'master'. What is the best way to pick the biasing resistors?
The vaules I mentioned is what is suggested by National Semi in their app note.
As I said "make provision" for them, if you don't need them don't use them but if you need them they can be fitted. |
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Ampertronics Pty. Ltd.
www.ampertronics.com.au
* Electronic Design * Custom Products * Contract Assembly
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Posted: Aug 02, 2010 - 05:08 AM |
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Joined: Feb 19, 2003
Posts: 1708
Location: Boston, MA
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A couple suggestions:
Decouple the RS-485 transceiver. Those things are noisy. I like to do a 100nF and a 10uF, both ceramic.
Something funny is going on on the first pin of JP6. I'm not an Eagle user so I can't comment as to what that is.
It looks like you're using U$, JP, and J as prefixes for your connector component designators. Any reason for this?
You have a 4-way junction between C12, R4, U1, and S_RST. This should be avoided. (it's easy to confuse this as two separate nets that cross over each other on the schematic without being connected to each other)
A pull down resistor on the RE'/DE pin of your transceiver will protect a resetting board from messing with your bus. Speaking of your transceiver - it needs a component designator!
Lastly - how far are you running SPI? It sounds like you're using both a RS-485 and a SPI bus to communicate between different boards? How many devices will be on the SPI? SPI really is not designed for that. But maybe I am misunderstanding.
The board looks solid - I'm being nit-picky - my only major concern is the SPI thing. |
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Posted: Aug 02, 2010 - 06:38 AM |
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Joined: May 04, 2007
Posts: 842
Location: Geelong Australia, Home of the "Cats"
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Quote:
You have a 4-way junction between C12, R4, U1, and S_RST. This should be avoided. (it's easy to confuse this as two separate nets that cross over each other on the schematic without being connected to each other)
I appreciate the above comment, but with Eagle it is quite permissible as the Junction blob, clearly indicates it is one net!
However I would recommend using the Show tool, to make sure all parts of that net are connected correctly, because it is possible with Eagle to lay down two nets and put a junction on one of them with the Junction tool, but that does not necessarily join two nets. Ie. you can be easily fooled into thinking it is one net. (See next comments on use/mis-use of Junction tool)
The junction on net PC2 near P$1 JP6 does not need to be there. It suggest, that you may have put it there
manually with the Junction tool. With Eagle I can't really recall using the Junction tool at all as they junctions should be added when more then two items join. Similarly they should auto-magically be deleted you remove an item from a junction with more than 2 items. When I taught Eagle, my instruction to students was that they needed to justify why they used the Junction tool as, it is more likely to mess things up than make things better.
I would move the +5V net a little to the left of the MOSI line, so it is clear that they are different nets. (This is quite the opposite logic to nleahcim as he no doubt uses a different CAD program) I just think it works better with Eagle, which I have used for about 15 years.
Rotating connector U$5 189 degrees allows you to connect MOSI & SCK directly together, without using the detached style. Similarly by moving the RS486 driver, you could directly connect RX & TX
Detached style is great when it avoids confusion, but if you don't need to use it and you do, it just makes the circuit harder to read.
Also, if you are likely to use a logic probe (or an oscilloscope), it can be handy to have a point for connecting the earth probe + +5 volt for the logic probe. Easy to allow for now, hard to put in later.
Don't forget to use the ERC & DRC tools and resolve any issues. When you are done triple check everything again! |
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(If you haven't already done so, edit your PostNuke profile and let let us know where you are, what you do & what your interests are.)
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Posted: Aug 02, 2010 - 10:29 PM |
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Joined: Feb 23, 2005
Posts: 102
Location: Salt Lake City, Utah
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I've made a bunch of the suggested changes which are listed below.
Latest changes:• Reformated the reset circuit and tried to clean up parts of the schematic
• Decoupled RS485 transceiver
• Fixed RX/TX leds
• Added pulldown on /RE
• Removed unnecessary junction
• Updated RS485 tranceiver to have a part designator
• Added biasing resistors to A/B lines for RS485 transceiver
• Connectors now use the same naming convention (CONx)
• Changed CON5 and CON6 part type
Quote:
Remember that uart comms idles in the '1' state, therefore the leds should go between the signal and VCC. The leds will then flash when there is data being received/sent.
Ah, thank you. I would have had to break out the scope before realizing that stupid mistake!
Quote:
It looks like you're using U$, JP, and J as prefixes for your connector component designators. Any reason for this?
I used parts from several different creators and hadn't renamed them yet. Renaming the items as I added them wasn't part of my process (but it will be moving forward).
Quote:
Lastly - how far are you running SPI? It sounds like you're using both a RS-485 and a SPI bus to communicate between different boards? How many devices will be on the SPI? SPI really is not designed for that. But maybe I am misunderstanding.
Data comes into the ATMega USART over the differential pair and then out the SPI to ATTiny boards. SCK is buffered on each ATTiny board and the MOSI line is buffered by the AVR (uses USI_DO). It was convenient to use USI on the ATTiny boards, so driving them with the SPI was an easy choice. The lights are currently spaced about 10".
You can chain up to 64 lights per string.
Unless somebody spots a show-stopper I'm going to move onto the PCB layout. I'll post here once the first attempt is complete.
Thanks again! |
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Posted: Aug 02, 2010 - 10:57 PM |
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Joined: Feb 19, 2003
Posts: 1708
Location: Boston, MA
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mhatter wrote:
Quote:
Lastly - how far are you running SPI? It sounds like you're using both a RS-485 and a SPI bus to communicate between different boards? How many devices will be on the SPI? SPI really is not designed for that. But maybe I am misunderstanding.
Data comes into the ATMega USART over the differential pair and then out the SPI to ATTiny boards. SCK is buffered on each ATTiny board and the MOSI line is buffered by the AVR (uses USI_DO). It was convenient to use USI on the ATTiny boards, so driving them with the SPI was an easy choice. The lights are currently spaced about 10".
You can chain up to 64 lights per string.
I'm still a bit worried about this. Are you saying that the MOSI_OUT and SCK_OUT lines only go 10", then both are buffered before going out to the next board? 10" is farther than I like for a non-differential bus, especially when you have a resistor in series with it, but I do think it will work. But your method of buffering sounds strange to me. Are you saying that you have a discrete buffer for SCK but are using two IO pins on the AVR to buffer MOSI? To me this suggests that you'll have unmatched propagation delays in those signals, so by the 64th node you may have serious problems, unless your SPI clock rate is super slow. |
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Posted: Aug 03, 2010 - 12:21 AM |
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Joined: Feb 23, 2005
Posts: 102
Location: Salt Lake City, Utah
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nleahcim wrote:
I'm still a bit worried about this. Are you saying that the MOSI_OUT and SCK_OUT lines only go 10", then both are buffered before going out to the next board? 10" is farther than I like for a non-differential bus, especially when you have a resistor in series with it, but I do think it will work. But your method of buffering sounds strange to me. Are you saying that you have a discrete buffer for SCK but are using two IO pins on the AVR to buffer MOSI? To me this suggests that you'll have unmatched propagation delays in those signals, so by the 64th node you may have serious problems, unless your SPI clock rate is super slow.
SCK_OUT has a discrete buffer and MOSI_OUT goes into DI on the ATTiny and out DO to the next ATTiny.
Maybe my crappy 'art' below will help. The ATTiny PCB is the section in brackets.
SCK_OUT_->[USCK Buf]->[USCK Buf]->[USCK Buf]->...
MOSI_OUT->[DI____DO]->[DI____DO]->[DI____DO]->...
The ATTiny is basically a programmable shift register doing PWM. The USI overflow ISR does a few things to make the string expandable while still updating the entire frame in sync.
I'm running the ATMega master SPI at 14745600/128 or 115200. The scope trace looks really clean with negligible skew. I added the series resistors because the buffer and the DO pin were overshooting causing the edges to be a little noisy.
I'll take a look again tonight on the scope and verify timing just to be sure. |
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Posted: Aug 03, 2010 - 09:38 AM |
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Joined: May 01, 2003
Posts: 64
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| Did anyone mention that you only need the 120R at the first and last position if the devices are in a 'chain' ? |
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Posted: Aug 03, 2010 - 04:32 PM |
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Joined: Feb 23, 2005
Posts: 102
Location: Salt Lake City, Utah
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chartman wrote:
Did anyone mention that you only need the 120R at the first and last position if the devices are in a 'chain' ?
I'm using the 485 tranceiver in a point-to-point configuration, so this node and its sibling (first and last node) will both have the termination resistors.
Thanks |
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Posted: Aug 05, 2010 - 10:09 PM |
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Joined: Feb 23, 2005
Posts: 102
Location: Salt Lake City, Utah
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The first draft of the board layout is attached. I'm looking for any and all feedback!
I still need to add cap values to the silk, but wanted to post this now so I could get more eyes on it (even if you only have one usable eye).
Thanks! |
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Posted: Aug 05, 2010 - 10:22 PM |
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Joined: Jul 27, 2001
Posts: 5386
Location: St. Leonards-on-Sea (UK)
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| I'd connect the crystal feedback capacitor ground directly to the nearest ground pin on the AVR. It'll be better from an EMC point of view than connecting it to the ground copper pour. It's mentioned in one of the AVR app notes on EMC. |
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Posted: Aug 06, 2010 - 05:22 AM |
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Joined: Dec 11, 2007
Posts: 3139
Location: Cleveland, OH
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I like to include a Version Number, Date, and my Name/Initials/Company Name, usually in copper, (I don't usually use a silkscreen), on the PCB.
It helps to identify the PCB at a latter time, particularly if any revisions in the board are ever made.
I like big markers for Pin 1 for the uC, ISP Header, and any additional connectors. It helps make it "fool proof" when one is working on the board late at night, when one is tired, and a deadline is approaching...
As you have so many spare pins and board space I would bring a few of them out to spare pads, and add pads for an LED or two. You don't have to install the "extra" LED, but it can be useful for debugging if you do it the old way, (no JTAG...). A spare Pad or LED also makes it easy to pulse a pin for a scope trigger, if needed, for debugging.
I also usually have V+ and Gnd pads near the edge of the PCB to easily connect a scope probe to ground, and to check the V+ supply.
Of course if all of your projects work first time then all this extra stuff to facilitate debugging isn't necessary! 
JC |
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Posted: Aug 06, 2010 - 10:57 AM |
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Joined: Mar 28, 2001
Posts: 13030
Location: Sydney, Australia (Gum trees, Koalas and Kangaroos, No Edelweiss)
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Quote:
I still need to add cap values to the silk
I never add values for any components. The reference number is all you need usually. |
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John Samperi
Ampertronics Pty. Ltd.
www.ampertronics.com.au
* Electronic Design * Custom Products * Contract Assembly
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Posted: Aug 26, 2010 - 06:18 PM |
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Joined: Feb 23, 2005
Posts: 102
Location: Salt Lake City, Utah
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leon_heller wrote:
I'd connect the crystal feedback capacitor ground directly to the nearest ground pin on the AVR. It'll be better from an EMC point of view than connecting it to the ground copper pour. It's mentioned in one of the AVR app notes on EMC.
I made this change but skimmed over the part about connecting the decoupling caps to the ground pins and not directly to the ground plane. So, the current boards in hand are more noisy than they could be.
Quote:
As you have so many spare pins and board space I would bring a few of them out to spare pads, and add pads for an LED or two. You don't have to install the "extra" LED, but it can be useful for debugging if you do it the old way, (no JTAG...). A spare Pad or LED also makes it easy to pulse a pin for a scope trigger, if needed, for debugging.
Thanks, it only took a few minutes to add three LEDs and break out a pin to a male header for scoping/triggering.
Quote:
Of course if all of your projects work first time then all this extra stuff to facilitate debugging isn't necessary!
Funny thing... the board is actually working great, but I spent over 2 hours last night with my JTAGICEMKII trying to figure out why it wouldn't program the boards.. I think it's broken  Had to break out the trusty STK500 to get them programmed.
Quote:
I never add values for any components. The reference number is all you need usually.
I switched all of the silk to component reference and not surprisingly it's easier to look at!
Here is a simple video I took last night running a colorwheel:http://www.youtube.com/watch?v=hsHIBNcdH_Q
The next phase of the project is building something to run many strands of lights in sync. I'm considering ARM/AVR32... That's another thread I guess.
Thanks again for the feedback.
Edit: added picture. |
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