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 Posted: Jun 10, 2008 - 10:32 PM |
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Joined: Aug 15, 2006
Posts: 43
Location: India
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With reference to ATmega32, I was wondering the difference between UDRIE and TXCIE.
What I understand is that the UDRIE is generated once the data is transferred from the UDR (transmit) register to the serial shift register. The transmission from the UART is not yet complete. The TXCIE is generated when the shift register is sent out.
If my understanding is correct, then both would occur simultaneously. As every time a byte is transmitted a new one would be loaded from the UDR(transmit) register and that would make UDR empty...
Have I got something wrong?
Is there a situation where UDRIE should be preferred over TXCIE or vice versa? |
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Bharath Bhushan Lohray
M.Sc.
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Posted: Jun 10, 2008 - 10:50 PM |
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Joined: Jan 12, 2002
Posts: 6972
Location: Canada
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Firstly the xxxIE bits sare the interrupt enables, and not the flags... you set these bits to enable the interrupt vector. What you want are the flag bits UDRE and TXC
They occur at different times. UDRE happens once UDR is empty. TXC happes once the last bit is shifted out of the shift register, and there is no new byte in UDR waiting to be shifted.
basic flow example: (transmitting 2 bytes, loading on UDRE)
Code:
Action Flags Comment
Startup UDRE=1 TXC=0
Load UDR UDRE=0 TXC=0 Software loads UDR
UDR->SR UDRE=1 TXC=0 Hardware loads Shift Register
LOAD UDR UDRE=0 TXC=0 Software loads UDR
after first byte finishes shifting
UDR->SR UDRE=1 TXC=0 Hardware Loads Shift Register
after second byte finishes shifting
nothing UDRE=1 TXC=1
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Posted: Jun 10, 2008 - 10:53 PM |
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Joined: Aug 15, 2006
Posts: 43
Location: India
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WOW... Thanks...
That table is really helpful... |
_________________
Bharath Bhushan Lohray
M.Sc.
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Posted: Jun 10, 2008 - 11:20 PM |
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Joined: Jan 12, 2002
Posts: 6972
Location: Canada
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| Just to further a bit... UDRE is level triggered... meaning that the ONLY way to clear it is to write a byte to UDR. TXC, on the other hand, is edge triggered, meaning that you must clear it by writing a 1 to it. (unless executing the related ISR, in which case it is cleared automatically) |
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Posted: Jun 11, 2008 - 12:35 AM |
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Joined: Jul 26, 2001
Posts: 204
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You generally only need to take notice of txc if you care about the time when the channel is finished transmitting - a common case is for RS485 or other shared-bus situaitons where you want to disable the output driver when the character has ended.
Another situaiton might be if you are sending something and then going to sleep or reconfiguring the UART- you need to wait for the character to finish being sent before doing anything that would mess up the UART. |
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