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Posted: Jul 20, 2012 - 05:22 PM |
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Joined: Jul 16, 2012
Posts: 18
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I am trying to use two timer interrupts at different intervals, but neither seem to be working at all?
Here is what I am using to initiate/start the timers.
Output is set in initSpeaker(), Timer 1/2 in the initTimerX and the timer counter is set in setPitchTX().
What am I doing wrong?
Code:
#include <avr/io.h>
#include <avr/interrupt.h>
void initSpeaker()
{
// Set PORTC0-1's data direction as output
DDRC |= (1 << 0) | (1 << 1);
}
void initTimer0 ()
{
// Setup timer 0, CTC mode, no pre-scaler
TCCR0A |= (1 << CS10) | (1 << WGM12);
// Enable CTC interrupt
TIMSK0 |= (1 << OCIE0A);
}
void initTimer1 ()
{
// Setup timer 1, CTC mode, no pre-scaler
TCCR1A |= (1 << CS10) | (1 << WGM12);
// Enable CTC interrupt
TIMSK1 |= (1 << OCIE1A);
}
void changePitchT0 ()
{
// Set timer 0 CTC compare number
OCR0A = 18181;
}
void changePitchT1 ()
{
// Set timer 1 CTC compare number
OCR1A = 13620;
}
int main(void)
{
initSpeaker();
initTimer0();
changePitchT0();
initTimer1();
changePitchT1();
sei(); // Enable interrupts
while(1)
{
// tbc
}
}
// Timer 0 compare routine
ISR(TIMER0_COMPA_vect)
{
// Toggle the output
PORTC ^= (1 << 0);
}
// Timer 1 compare routine
ISR(TIMER1_COMPA_vect)
{
// Toggle the output
PORTC ^= (1 << 1);
}
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Posted: Jul 20, 2012 - 05:40 PM |
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Joined: Jul 23, 2001
Posts: 2437
Location: Osnabrueck, Germany
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jduffy wrote:
What am I doing wrong?
1) You are posting in the wrong forum.
2) You are not telling us what AVR you are using.
(what AVR has a 16 bit Timer0?)
3) Even without knowing what specific AVR model you are using I doubt that CS10 and WGM12 are located in TCCRxA. |
_________________ Stefan Ernst
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Posted: Jul 20, 2012 - 05:59 PM |
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Joined: Feb 12, 2005
Posts: 16274
Location: Wormshill, England
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As far as I can see, only tiny261/461/861 and mega16hv chips have 16-bit TCNT0. The tiny has no PORTC.
Your code looks fine to me, but you do realise that you don't need interrupts to toggle OCnx pins via CTC mode.
It does make a real difference to your answer success rate if you simply say which chip, language, compiler.
David. |
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Posted: Jul 20, 2012 - 07:18 PM |
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Joined: Jul 16, 2012
Posts: 18
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Apologies, I am using an atmega328p. gcc-c++ compiler.
Taking your advice so far, and using information I can work out from the datasheet I have come up with this.
I noticed the following bit in TCCR1A
(1 <<COM1A0) (1 << COM1B0)
Can I use this and toggle at different speeds, without an interrupt? Am I going about it right below?
Code:
void initSpeaker()
{
// Set PORTB1-2's data direction as output
DDRB |= (1 << 1) | (1 << 2);
}
void initTimer1 ()
{
// Setup timer 1, CTC mode, no pre-scaler, OUTPUT COMPARE ON BOTH PINS?
TCCR1A |= (1 << WGM10) | (1 <<COM1A0) | (1 << COM1B0);
// Enable interrupt flag?
TIFR1 |= (1 << OCF1A);
// Enable CTC interrupt
TIMSK1 |= (1 << OCIE1A);
}
void initTimer2 ()
{
// Setup timer 2, CTC mode, no pre-scaler
TCCR2A |= (1 << CS10) | (1 << WGM12);
// Enable interrupt flag?
TIFR2 |= (1 << OCF2A);
// Enable CTC interrupt
TIMSK2 |= (1 << OCIE2A);
}
void changePitchT1 ()
{
// Set timer 0 CTC compare number
OCR1A = 18181;
}
void changePitchT2 ()
{
// Set timer 1 CTC compare number
OCR2A = 13620;
}
void setPulseWidth()
{
// tbc
}
void setOctave()
{
// tbc
}
void setTranspose()
{
// tbc
}
void setChord()
{
// tbc
}
int main(void)
{
initSpeaker();
initTimer1();
changePitchT1();
initTimer2();
changePitchT2();
sei(); // Enable interrupts
while(1)
{
// tbc
}
}
// Timer 1 compare routine
ISR(TIMER1_COMPA_vect)
{
// Toggle the output
PORTB ^= (1 << 1);
}
// Timer 2 compare routine
ISR(TIMER2_COMPA_vect)
{
// Toggle the output
PORTB ^= (1 << 2);
}
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Posted: Jul 20, 2012 - 07:58 PM |
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Joined: Feb 19, 2001
Posts: 25891
Location: Wisconsin USA
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Posted: Jul 20, 2012 - 08:35 PM |
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Joined: Nov 17, 2004
Posts: 13820
Location: Vancouver, BC
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Code:
TCCR2A |= (1 << CS10) | (1 << WGM12);
Neither of these bits is in TCCR2A.
Code:
OCR2A = 13620;
Timer 2 is >>NOT<< a 16 bit timer, it is 8 bit.
No where are you starting Timer1. |
_________________ Regards,
Steve A.
The Board helps those that help themselves.
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