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 Posted: May 31, 2012 - 05:59 PM |
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Joined: Sep 15, 2011
Posts: 131
Location: Israel
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Some time ago I had to design a circuit which will pull a node (Vref - see schematic) in the circuit to Vcc.
I decided to use a pnp bjt for that and drive it with an npn.
I wanted to use the minimum number of parts for this so I came up with the attached schematic.
I haven't actually built the circuit but LTSpice says it should work.
Is there any flaw in it ? Or any reason not to use it and use something classic like this:
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Posted: May 31, 2012 - 07:42 PM |
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Joined: Jun 04, 2007
Posts: 490
Location: Norway
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Only possible problem I see is that it may burn the variable resistor if it is adjusted near ground position. Calculate the current for VCC over the center tap to ground and add a fixed resistor to make it more safe.
Perhaps a pullup (100k?) from PNP base to VCC makes it more safe too. |
Last edited by Heihopp on May 31, 2012 - 07:44 PM; edited 1 time in total
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Posted: May 31, 2012 - 07:43 PM |
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Joined: May 24, 2004
Posts: 5994
Location: Tampere, Finland
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| If vcc is same as AVR supply, and io comes from AVR, why put two transistors? In fact in that case no components are needed at all. |
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Posted: May 31, 2012 - 09:00 PM |
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Joined: Nov 22, 2002
Posts: 12040
Location: Tangent, OR, USA
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I would add a pull-up resistor on the base of the PNP. Say 22K to 47K in either case. Transistors tend to be slow to turn off when there is no "discharge" path for the base (that is, they are left "floating" as in both examples). Adding a resistor also reduces noise sensitivity.
Jim |
_________________
Jim Wagner
Oregon Research Electronics, Consulting Div.
Tangent, OR, USA
"The only thing standing between us and victory is defeat" P.G.Wodhouse in Wooster & Jeeves series
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Posted: May 31, 2012 - 10:53 PM |
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Joined: Sep 15, 2011
Posts: 131
Location: Israel
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There is no avr actually, this design just uses some comparators and SR flip flops.
I see the issue of having the pot close to ground and pulling it to vcc might cause, I'll add another small resistor from the pot to the ground, thanks.
I've seen some npn's/pnp's with pull downs/ups at their base. And I never really understood what is that for, bjt operate on current how would that be effected by noise ?
What causes the slow turn off ? just parasitic capacitance ? how slow is it ?
I would love to read more about it, is there any good source for this ?
One last thing, is the pnp more vulnerable to noise/slow turn off ? If I add a pull up on the pnp I guess I should add a pull down on the npn too, am I right ?
Did you assume the npn is being driven by an avr which won't allow it to float ?
Thanks for everything,
Mike. |
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