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NilRecurring
PostPosted: Nov 11, 2011 - 11:02 PM
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I was going through Elm Chan's FatFs MMC schematic because I need to implement an SPI bus on my board. I noticed that SS, MOSI and MISO all have a pull up resistor on them.



Full Size Link: http://i.imgur.com/bNaP4.png

I understand why its there on SS, but why MOSI and MISO? I know that they aren't strictly required because on a recent project I simply have 4 traces going to the SPI peripheral.

The SPI bus that I have to implement will have 4 devices:
1) CPLD configured as a Serial In Parallel Out shift register
2) CPLD configured as a Parallel In Serial Out shift register
3) Another CPLD...
4) SD Card

Now, I planned on having 10K pull ups on each SS line anyway, but should I include the MOSI and MISO ones as well? Is it good practice and if so, why do I stand to gain from them?[/img]
 
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david.prentice
PostPosted: Nov 11, 2011 - 11:07 PM
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There is absolutely no need for pull-ups on MISO, SCK, MOSI when the connections are permanent.
OTOH, they will do no harm.

Yes. It is essential for SS.

David.
 
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NilRecurring
PostPosted: Nov 12, 2011 - 12:50 AM
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Thanks David. And I assume 10K would be a good value to use? I'm using 10Ks as pull ups for other stuff as well so it would be quite convenient.
 
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ka7ehk
PostPosted: Nov 12, 2011 - 02:55 AM
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Pull-up resistors are ONLY needed when you have open collector/drain bus drive, as in TWI/I2C. SPI is full logic drive, hence GENERALLY not needed.

There is, however, one situation in SPI where a pull-up could be useful. When the SPI device(s) is disabled (/S line high), the output pin goes Hi-Z so that any other active SPI device can drive that line. Hi-Z means that it has the electrical characteristics of an input (without being able to actually input anything). You Might add a pull-up resistor to this line so that the state will be defined when nothing is driving it (nothing selected). Few SPI systems bother with this detail, but it would keep the master end of the MISO line away from the voltage area near Vcc/2 where the input circuit will take more current (from power supply to ground) than is usual for a CMOS input circuit.

Hope this makes sense.

Jim

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js
PostPosted: Nov 12, 2011 - 04:00 AM
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In this case MISO needs one as the SD card may not be plugged in and floating pins are not nice.

There is also the power up time which could be several ms, spurious signals from the floating pins could
inject signals into the card.

Overall I think in the case of a SD card interface it's a good habit to use pullup\down resistors.
Notice that SCLK has a pulldown.

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Jepael
PostPosted: Nov 12, 2011 - 05:51 AM
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Well there must be pull-ups because the MMC card specs that are freely available on internet say there must be pull-up resistors on all pins. Even the suggested value is specified there, I bet it is larger than 10k, but, 10k will work just fine.

This is because natively the cards are initialized in open-collector mode. This does not apply to SPI mode though.

But yes if the reason for pull-ups is to avoid floating pins, then all pins must have pull-ups, because the sees floating pins before AVR initializes the pins to outputs, and because the AVR will see floating data input until the card has been configured into SPI mode.

I have shaved off few milliamps of current consumption by just putting a 10k pull-ups on unused data pins of SD cards.

And the final warning: you cannot be absolutely sure if the memory card releases its data output pin in SPI mode into high impedance state when the chipselect pin is disabled. Different cards may behave differently. For example some cards can be controlled to read a sector, then disabled while it is fetching sector data to do other SPI stuff, and then enabled to read the data.
 
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NilRecurring
PostPosted: Nov 12, 2011 - 08:57 AM
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Oh i see. Thanks for this guys. So I think I will include the pull ups and pull down. But since they are really specifically for SD Card, should I located them near the SD Card?

Obviously the SPI bus will branch out and go out to the concerned chips. So, the pull up/down should be on the specific SD Card branch? Not sure if it matters, but I thought I'd ask incase there's an oversight on my part.
 
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clawson
PostPosted: Nov 12, 2011 - 12:42 PM
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Note that in the FatFs tutorial thread there are reports of people who had some SD cards that would not read but when pull-ups were added it then worked. So it's not just theory. You do need them. I wired mine up without and found about 3 out of 8 cards that would not read. I never got a chance to try the pull-ups as I only read about this later after the prototype circuit had been disassembled.

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Jepael
PostPosted: Nov 12, 2011 - 01:13 PM
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NilRecurring wrote:
Oh i see. Thanks for this guys. So I think I will include the pull ups and pull down. But since they are really specifically for SD Card, should I located them near the SD Card?

Obviously the SPI bus will branch out and go out to the concerned chips. So, the pull up/down should be on the specific SD Card branch? Not sure if it matters, but I thought I'd ask incase there's an oversight on my part.


There is no pull down in the specs, all lines have pull-ups.

If all devices are connected together, does it matter where the pull-ups are? Either near AVR because it is the master and drives the bus, or in the middle of the bus because the pull-ups are bus-specific, or near memory card because it is the memory card that requires those.

But it is just not because of the memory card. A lot of devices hate hanging on a bus with undefined levels, so the pull-ups do concern all devices or the bus as a whole.
 
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NilRecurring
PostPosted: Nov 12, 2011 - 01:53 PM
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Jepael, can you please post a link to the specs? I've googled and I did come across some specs from Sandisk among others but none of them talked about Pull up resistors - I searched every PDF. So I didn't find the specs you mentioned.

OK - just to be sure I understand everything:
1) I ought to put ups on every line, SS, SCK, MOSI and MISO.
2) It doesn't really matter where I place, so I think I'll place them near the uC.

I think I would prefer to use the value outlined in the specs but I can't really find the document. If someone could even let me know the name of the document or the website I can find it at, I'd be most grateful.

EDIT: Thanks Clawson. I did read the thread a few weeks ago, but didn't remember that issue. I did know someone had trouble accessing some cards but didn't think it could be due to lack of pull ups.
 
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Jepael
PostPosted: Nov 12, 2011 - 08:27 PM
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Google for MMC datasheet, first pdf file is from Samsung...
 
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NilRecurring
PostPosted: Nov 12, 2011 - 08:57 PM
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Thank you. Is it table 5-5 (page 19) that you were referring to? It states that for the CMD pin I need to a pull up between 4.7K and 100K. And 50K to 100K for others.

If that is the table you meant, I think I'll go for 50K for all the pins. One thing though I wanted to be sure about: I can leave out pull up on SCK, right? It's not in the specs (unless I missed something). Just want to be sure because there is a resistor on SCK in the schematic I posted.
 
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ka7ehk
PostPosted: Nov 12, 2011 - 10:31 PM
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SCK is the one that needs a resistor, the least. It is always under the control of the SPI clock generator as long as SPI is enabled.

Jim

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Jepael
PostPosted: Nov 12, 2011 - 11:46 PM
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Sorry, you are right, the specs do not say resistors on SCK, because it is always supposed to be push-pull on host.

Put either pull-up or pull-down, depending on what state you are planning to have the clock when idle. The card does not care, but other devices can certainly care about idle state. I think I had a pull-up.
 
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hugoboss
PostPosted: Nov 12, 2011 - 11:58 PM
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There is also a matter of driving strength, for long signal lines, or to "fix" a Vio that is lower than normal. Take for example a micro running at "3.3v". The actual power supply voltage might be 3.0v. The IO pin voltage drop might be 0.3v. The output might be connected to a cable, lets say 20cm long. Let's say the target detects a logic shift at 2.4v. Wouldn't take a lot of noise to have communication errors. The pull-up resistors in this case serve to:

- Eliminate the IO pin voltage drop
- Provide higher drive current if necessary for better noise immunity on long signal paths.
 
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js
PostPosted: Nov 13, 2011 - 03:06 AM
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Quote:
SCK...is always under the control of the SPI clock generator as long as SPI is enabled.
True but what can happen for, say, those 16K clock cycles + 65ms at start up (or whatever selected) while the processor is NOT in control of anything? Smile

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NilRecurring
PostPosted: Nov 13, 2011 - 01:17 PM
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OK, I think I'll go with 50K pull ups on all lines SS, SCK, MOSI and MISO. Smile

Thanks a lot guys. You folks cleared up a lot of things for me.
 
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bobgardner
PostPosted: Nov 13, 2011 - 05:37 PM
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Isn't the pullup used to goose up the 3.3V sd card out to a little above the avr minimum input voltage when running from 5V?

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Jepael
PostPosted: Nov 14, 2011 - 05:16 AM
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No, because of two reasons.

The AVR pictured here is not run on 5V but with same 3.3V supply as the card, so this kind of tricks is not necessary.

Also, if you have a CMOS output stage that outputs high and runs on 3.3V, and if you had a pull-up to 5V, what is the node voltage again? My experience is that it stays near 3.3V unless the high side output transistor is disabled (like pin tristated).
 
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NilRecurring
PostPosted: Mar 22, 2012 - 03:49 PM
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Does anyone here have a copy of the MMC spec? The one that was listed at: http://www.samsung.com/global/system/business/semiconductor/product/2007/6/11/FlashCard/MMC/HighSpeedMMC/FullSize_MMCplus/MC4GH02GNMCA/ds_HS_MMC_rev03.pdf no longer seems to be there. Would someone be kind enough to share the spec?
 
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