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 Posted: Sep 09, 2011 - 06:15 AM |
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Joined: Jul 09, 2009
Posts: 32
Location: ShenZhen China
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I know how to configure the EBI if the XMEGA only connect to one FPGA like this:
#define FPGA_BASE_ADDR ((uint8_t*)0x4000)
/* Initialize EBI. */
EBI_Enable( EBI_SDDATAW_8BIT_gc,
EBI_SRMODE_ALE1_gc,
EBI_SRMODE_NOALE_gc,
EBI_IFMODE_3PORT_gc );
/* Initialize SRAM */
EBI_EnableLPC( &EBI.CS0,
EBI_CS_ASPACE_64KB_gc,
(void *) FPGA_BASE_ADDR, 2 );
But now if I want to add a FPGA and use CS1 to select it. Can I just modify the code as follow?
#define FPGA1_BASE_ADDR ((uint8_t*)0x4000)
#define FPGA2_BASE_ADDR ((uint8_t*)0x14000) // Add 64K space
/* Initialize EBI. */
EBI_Enable( EBI_SDDATAW_8BIT_gc,
EBI_SRMODE_ALE1_gc,
EBI_SRMODE_NOALE_gc,
EBI_IFMODE_3PORT_gc );
/* Initialize FPGA1 */
EBI_EnableLPC( &EBI.CS0,
EBI_CS_ASPACE_64KB_gc,
(void *) FPGA1_BASE_ADDR,
2 );
/* Initialize FPGA2 */
EBI_EnableLPC( &EBI.CS1,
EBI_CS_ASPACE_64KB_gc,
(void *) FPGA2_BASE_ADDR,
2 ); |
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Posted: Sep 13, 2011 - 01:56 AM |
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Joined: Jul 09, 2009
Posts: 32
Location: ShenZhen China
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Posted: Sep 13, 2011 - 02:00 PM |
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Joined: Dec 08, 2004
Posts: 4719
Location: Nova Scotia, Canada
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According to the XMEGA A architecture manual, if you set up any CS pin on the EBI to use any address space larger than 4 kB, you must use a base address that is a multiple of the address space size.
So, for a 64 kB address space, the base address must be a multiple of 64 kB - for example, 0x00000, 0x10000, 0x20000, 0x30000, 0x40000, etc. Your two base addresses (0x04000 and 0x14000) are not multiples of 64 kB, so I wouldn't guarantee that it's going to work.
If you have any address spaces above the 64 kB boundary, then you may run into trouble actually addressing "data" that lives in that area, depending on the capabilities of your compiler. I don't know what compiler you're using. But I'll use AVR-GCC as an example. AVR-GCC will only allow you to use native pointers that are 16-bits in width, not enough to reach addresses beyond 0x0FFFF. Therefore, you'd have to write helper functions, probably in assembly, to take care of managing the RAMP registers for such "far" pointers, protecting the system from unexpected interrupts while you are in the functions, and returning all the RAMP registers to their normal state before returning.
Do you really need the full 64 KB address space for each FPGA? If you can get away with (much!) smaller address spaces, then you'll find things much more comfortable to program. |
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