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 Posted: Jun 22, 2012 - 09:34 AM |
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Joined: Nov 06, 2009
Posts: 44
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Just getting to grips with the TWI on Xmega.
Can anyone explain the QCEN and SMEN bits in CTRLB?
The docs seem a bit light on these.
I think QCEN makes the hardware send a STOP condition on receipt of a slave ACK automatically and the SMEN makes the hardware send an ACK or NACK after the DATA register is read.
Can anyone confirm that the basic operation is that after an address is set, or byte is sent, the WIF interrupt is only triggered when an ACK or NACK is recieved from the SLAVE. In other words, you don't need to wait for the RXACK flag to be cleared/set, you just check it in the ISR.
Cheers. |
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Posted: Jun 22, 2012 - 09:37 AM |
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Joined: Jul 18, 2005
Posts: 62944
Location: (using avr-gcc in) Finchingfield, Essex, England
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| I haven't looked but I'm willing to bet that ASF has some Xmega TWI support and you could look at how it uses those bits. |
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Posted: Jun 22, 2012 - 03:06 PM |
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Joined: Nov 06, 2009
Posts: 44
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Can't see any reference to those bits in the app note code.
Also trying to understand what puts the TWI hardware into read or write modes. I am guessing it's done by bit 0 of the address byte as this has to be set accordingly, but I was not sure that some other register bit needs setting or clearing. |
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Posted: Jun 22, 2012 - 10:54 PM |
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Joined: Nov 06, 2009
Posts: 44
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Just found my problem...
The EEPROM chip I'm writing to takes 5ms to program a byte so you have to poll it for an ACK prior to writing a byte or after sending the Stop command for the previous byte.
That also explained why when debugging it worked and running full speed didn't! 
Given that, it's a bit pointless having a nice fast bit of hardware to do the transmissions!
I guess I'll just write data away one byte at a time from the system timer ISR, every 10ms or so.
Still experimenting with the QCEN and SMEN just to understand what they do. |
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Posted: Jun 27, 2012 - 08:57 AM |
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Joined: Jun 26, 2012
Posts: 5
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I'm using a 24AA512 which has a 128 buffered page write capability so what I'm doing is sending a page as fast as I can (400khz) over TWI and then writing to the buffer from my program whilst the EEPROM does it's thing.
What this allows me to do is not have to wait for those 5ns between writes. |
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