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gahelton
PostPosted: May 12, 2012 - 02:43 PM
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The ATTINY2313 comes real close to meeting your needs for hardware I2C(TWI) and SPI - also very low cost. However, even though this processor supports both of these functions with separate sets of hardware using the USI and UART respectively, they share the same pins. This is unfortunate.

The next stop for hardware TWI and SPI is the ATMEGA48 which you believe to be too costly.

Looks like bit banging is in your future. However, don't fret. Bit banging an SPI in master mode is extremely simple and fast.
 
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bobgardner
PostPosted: May 12, 2012 - 02:56 PM
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Finally. For once, someone else on this stoopid forum has the sense to just type in the message to fill the screen with automattically wrapped text. It looks so warm and familiar. It made my morning.

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larryvc
PostPosted: May 12, 2012 - 04:57 PM
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Oh, thank you. I thought you would like that. Wink

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larryvc
PostPosted: May 13, 2012 - 04:32 AM
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Jim,

Im sure there are many other demos for SPI and usi but I came across this one on the net. I tried the Master-Slave code and it works great. I plan on trying the ATtiny2313 USI as Master code next.

http://www.jaxcoder.com/Projects.aspx?id=280385176

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flenser
PostPosted: May 14, 2012 - 12:34 PM
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Jimlake,

Not only is there a core speed difference between the PIC & Atmel products but the words are different bit lengths.

PIC16F684 has 2k words flash, which is actually 3.5k bytes because of a 14-bit word length.

Atmel's Attiny processors have a 16-bit word length so the attiny24 & attiny2313 processors will have only 1k words flash (2kB), the attiny44 2k words flash (4kB) and the attiny84 4k words flash (8kB).

Flenser
 
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jimlake
PostPosted: May 15, 2012 - 03:02 AM
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To address Steve's question, it appears that most of the small 8 bitters do not have a SPI, the AVR's, at least, have a USI. None of them have a i2c.

It looks to me like the difference between the SPI and the USI is the lack of MISO. This can be a bit of a pita if the other device is expecting a full HW SPI. I have decided to resolve this by using a Mega48. In the VQFN package, it is very small, but it does cost more than the Tiny.
 
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barnacle
PostPosted: May 15, 2012 - 06:35 AM
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As a master, SPI is easier to generate than I2C which is basically an abomination of a protocol. Having to change the direction of both the clock and data line in I2C to manage the three-state and clock stretching parts is a pain, and the PIC's inability properly to implement read/modify/write when a port is driving a capacitive load is extremely annoying.

There are PICS in the 18F series (next size up basically - twenty-eight pins or more) that have UART, SPI, and I2C but the implementation on the ones I examined meant that you could use only one of the three at a time, and the distribution of pins was such that even the inputs and outputs didn't match so it would be very tricky to change between them programatically.

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stevech
PostPosted: May 15, 2012 - 06:36 AM
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All relative I suppose. To me, the mega32 is "small", in that RAM size tends to limit what you can do.

indeed, there are many 2KB code apps. I just don't often do that kind.
 
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snigelen
PostPosted: May 15, 2012 - 08:51 AM
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The tiny48/88 do have both SPI and I2C (but no usart Sad).
 
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MBedder
PostPosted: May 15, 2012 - 09:15 AM
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The Tiny1634 has 2 UARTS, 2 I2C, SPI (via UART/USI), ADC etc. in a 20 pin package.
 
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lfmorrison
PostPosted: May 15, 2012 - 12:43 PM
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MBedder wrote:
The Tiny1634 has 2 UARTS, 2 I2C, SPI (via UART/USI), ADC etc. in a 20 pin package.

And no inventory from any of Atmel's preferred distributors.
 
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lfmorrison
PostPosted: May 15, 2012 - 12:53 PM
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jimlake wrote:
To address Steve's question, it appears that most of the small 8 bitters do not have a SPI, the AVR's, at least, have a USI. None of them have a i2c.

It looks to me like the difference between the SPI and the USI is the lack of MISO. This can be a bit of a pita if the other device is expecting a full HW SPI. I have decided to resolve this by using a Mega48. In the VQFN package, it is very small, but it does cost more than the Tiny.


What exactly do you mean by "no MISO"?

The USI uses DI (MISO for Master systems, MOSI for Slave systems), DO (MOSI for Master systems, MISO for Slave systems), and USCK (SCLK output for Master systems, SCLK input for Slave systems).

It does not have hardware slave select - but for a SPI master, that's a fairly easy limitation to work around.

It is designed to do SPI modes 0 and 1; apparently it's not suited to modes 2 or 3.

Section 14.3.2 of the ATtiny24 datasheet shows an assembly function for USI operating in 3-wire Master mode, that accepts the desired output byte to be sent to the slave via DO as an argument, and returns the read-back value from DI.

Section 14.3.3 demonstrates using the USI in 3-wire Slave mode.
 
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theusch
PostPosted: May 15, 2012 - 02:43 PM
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Quote:

The Tiny1634 has 2 UARTS, 2 I2C, SPI (via UART/USI), ADC etc. in a 20 pin package.


Wow--where did THAT model come from?
 
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clawson
PostPosted: May 15, 2012 - 02:45 PM
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Quote:

Wow--where did THAT model come from?

+1

Is there anything else "lurking"? I imagine the device support list in the recently released final AS6 might be a good place to look for "new meat"?

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theusch
PostPosted: May 15, 2012 - 02:48 PM
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Quote:

And no inventory from any of Atmel's preferred distributors.


How can you say that, when Atmel's press release from March says
Quote:
All AVR ATtiny1634 devices are available now...
Twisted Evil
 
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gchapman
PostPosted: May 15, 2012 - 06:49 PM
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theusch wrote:
Wow--where did THAT model come from?
What's Changed.
Thank you Atmel!
 
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MBedder
PostPosted: May 15, 2012 - 06:54 PM
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gchapman wrote:
Thank you Atmel!
...for yet another vaporware chip Laughing
 
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gahelton
PostPosted: May 16, 2012 - 12:00 AM
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Mouser is showing a delivery date of 7/6/2012 for the ATTINY1634. This looks like a really nice part for less than $1.00.
 
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bobgardner
PostPosted: May 16, 2012 - 12:30 AM
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So someone wanted an avr with those specs, and placed an advance order for a couple million or whatever the R&D deal was, and the distributers get what overflows into the supply chain after the initial run to the initial customer is fulfilled? How does the distribution model work? If they can deliver in 2 months after the product announcement, they must be building up stock. Any old semiconductor retiress out there that want to give some insight how it really works?

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bobgardner
PostPosted: May 16, 2012 - 12:35 AM
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On a similar theoretical semiconductor question... would an AVR with dual CPUs get anyone excited? Seems like if you consider yourself an Expert AVR programmer, the idea of being able to write two programs/tasks and get double thruput is a win. Digital filters, etc. If anyone from Atmel reads this and forwards it to the VP of Good Ideas Submitted from the AVRfreaks, just add a PS that this one is a stockholder.

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