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ganzziani
PostPosted: Mar 24, 2012 - 10:52 PM
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I just tested my Xprotolab at 64MHz and everything seems to work! Shocked (Besides that all the time bases need to be at half). This is the device with the ATXMEGA32A4U. The ADC worked (I could see waveforms up to 2MHz). The DAC worked, the frequency of the output waveform was double.
Maybe I could offer an "overclocked" firmware...
The micro did not run beyond 72MHz.

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AtomicZombie
PostPosted: Mar 27, 2012 - 05:57 PM
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Thanks for the report.

Looks like 64MHz is the (ahem) "safe" overclocking number so far. Not bad... double the speed!

Brad

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condemned
PostPosted: Apr 18, 2012 - 10:50 PM
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I offer the following data:

I've just been running an XMega192A3U at 64Mhz (external 16Mhz crystal, PLL x4).
Only limited testing - just DMA'ing pixel data to the USART.
Everything seemed perfectly OK Smile
 
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AtomicZombie
PostPosted: Apr 19, 2012 - 10:10 PM
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See here...

http://www.avrfreaks.net/index.php?name ... 311#948311

It's a sad day to loose another 22MIPs!

Brad

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ganzziani
PostPosted: Apr 20, 2012 - 01:01 AM
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Well, good that it can do 64MIPS under some (or most?) circumstances...

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AtomicZombie
PostPosted: Apr 21, 2012 - 12:40 AM
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Yes, so far only the ELPM command has caused a problem, and only when crossing what seems to be the 128k address in program memory.

And it's not a total failure, more like a skipped cycle. very odd, but not so good for my video routine!

Brad

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AtomicZombie
PostPosted: Apr 21, 2012 - 09:03 PM
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Code:
Update


After exhaustive tests using an ATxmega256A3, I have found the highest stable overclocking frequency to be 50Mhz. 54Mhz begins to fail on the ELPM instruction when crossing the 128K barrier.

Without using ELPM, 70MHz seems to pass all tests, using every other instruction, and 100% of program as well as internal SRAM.

None of my testing did any EEPROM writing though.

Brad

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TFrancuz
PostPosted: Apr 22, 2012 - 08:06 AM
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I can confirm that XMEGA128A1’s EBI works fine @100MHz (core @50 MHz), maybe more, but I didn’t tested it.
BTW, in your project do you use external SRAM? If yes, in which configuration, and how fast can you access it?
 
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AtomicZombie
PostPosted: Apr 22, 2012 - 04:58 PM
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Thanks for the report.

Yes, in one version of my project, I control 512K external SRAM, but since the EBI is too slow, I wrote my own access routines in assembly. I can get 25MHz bandwidth from an external SRAM with the XMega running at 50MHz.

Brad

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jmaja1
PostPosted: Apr 22, 2012 - 07:01 PM
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What is the point of overclockin XMega instead of using some other processor cabable of the speeds needed? I'm running XMega at 2 MHz and I'm surprised how much it can do even at that speed.
 
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clawson
PostPosted: Apr 22, 2012 - 07:30 PM
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Video generation is the microcontroller equivalent of climbing Everest. Why do it? Because it's there.

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MarioRivas
PostPosted: Apr 22, 2012 - 07:40 PM
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clawson wrote:
Video generation is the microcontroller equivalent of climbing Everest. Why do it? Because it's there.


Great answer!

Can some one post the highest clock achieved without an eeprom failure?

I suspect this will be the limiting factor for most of us.

Also is there a feasible way of increasing the internal voltage ?
 
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jmaja1
PostPosted: Apr 22, 2012 - 08:41 PM
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clawson wrote:
Video generation is the microcontroller equivalent of climbing Everest. Why do it? Because it's there.


OK. So there is no technical or economical reason to use XMega instead of a faster CPU?
 
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MarioRivas
PostPosted: Apr 22, 2012 - 09:59 PM
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jmaja1 wrote:
clawson wrote:
Video generation is the microcontroller equivalent of climbing Everest. Why do it? Because it's there.


OK. So there is no technical or economical reason to use XMega instead of a faster CPU?


If you don't get it, read the title of the website you're in.
 
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jmaja1
PostPosted: Apr 23, 2012 - 09:13 AM
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MarioRivas wrote:

If you don't get it, read the title of the website you're in.


Yes I get it. I was just interested are there also some real benefits for using XMega instead some other CPU for that purpose.
 
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TFrancuz
PostPosted: Apr 23, 2012 - 10:31 AM
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AtomicZombie wrote:
Thanks for the report.

Yes, in one version of my project, I control 512K external SRAM, but since the EBI is too slow, I wrote my own access routines in assembly. I can get 25MHz bandwidth from an external SRAM with the XMega running at 50MHz.

Brad

Can you be more specific about EBI, please? I use EBI with SDRAM module (XPlained 128A1), and LD instruction from SDRAM takes 6 cycles, and what is worse, it depends on refresh cycle. I plan to use SRAM 10ns, so EBI can work without wait states, and according to XMEGA A datasheet in LPC2 mode, read/write operations should take 4 CLPKER2 cycles (2 CLKPER cycles), and even better in no CS mode. To me it is enough, but I don’t know if I can trust the datasheet, and I don’t have a functional circuit to test it.
And, BTW, how you can get better timing then 2 cycles/access without EBI? Do you use some external components, like counters or so?
 
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angelu
PostPosted: Apr 24, 2012 - 01:40 AM
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Quote:
but I don’t know if I can trust the datasheet

but
Quote:
I can confirm that XMEGA128A1’s EBI works fine @100MHz (core @50 MHz), maybe more, but I didn’t tested it.


George.

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AtomicZombie
PostPosted: Apr 28, 2012 - 02:51 PM
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TFrancuz wrote:


Can you be more specific about EBI, please? I use EBI with SDRAM module (XPlained 128A1), and LD instruction from SDRAM takes 6 cycles, and what is worse, it depends on refresh cycle. I plan to use SRAM 10ns, so EBI can work without wait states, and according to XMEGA A datasheet in LPC2 mode, read/write operations should take 4 CLPKER2 cycles (2 CLKPER cycles), and even better in no CS mode. To me it is enough, but I don’t know if I can trust the datasheet, and I don’t have a functional circuit to test it.
And, BTW, how you can get better timing then 2 cycles/access without EBI? Do you use some external components, like counters or so?


For most of my projects, 4 cycles would be a lifetime! I usually use external SRAM when doing VGA projects, so I need pixels out of the video memory at 2 cycles, or even 1 cycle. For two cycles, I can push an 8 bit address like so...

Code:

inc ADRLO ;1
out PORTA,ADLO ;1


This was giving me fCLK/2 as a pixel clock. I have also experimented with tying the LSB to the system clock and switching it with an external logic switch such as an HC157, and this gives a pixel clock equal to the AVR clock.

Things get more difficult when needing a sequential address of more than 256 since only one port can be pumped at fCLK/2. Because of this, I have not been able to create a bitmapped VGA system beyond 256 horizontal pixels.

Here is some of my older (and much cruder) work using AVRs to generate VGA...

http://lucidscience.com/pro-vga%20video ... tor-1.aspx

But a plan is in the works for 512x384 using XMega and only an external 512k SRAM.

I am also working on a project to bitbang HDMI at 640x480 without anything but passive components and an XMega. I hope to be the first to do it!

Brad

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condemned
PostPosted: Apr 28, 2012 - 04:13 PM
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Whoa! HDMI?! Doesn't that need crazy speeds? e.g. 10 bits per pixel, and a pixel clock of 25.175Mhz?
 
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AtomicZombie
PostPosted: Apr 29, 2012 - 03:13 PM
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indeed! But since 50MHz is possible on XMega, that may be enough. I live for "impossible AVR tricks"! When I read on several sites that synthesizing full NTSC color in software would be either impossible or yield only a few colors and massive pixels, I just had to tackle the task. Now HDMI is on the radar!

Next rainy weekend I will try to get the 256 color XMega game system documented and online. A local engineering firm also offered to make boards for this thing, so I may go for it. Drop on a few switches and make it into a hand held XMega game system / learning kit.

Brad

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