AVRFreaks.net

#define F_CPU 1000000UL

#include <avr/io.h>
#include <avr/interrupt.h>
#include <util/delay.h>
#include <avr/sleep.h>
#include <avr/wdt.h>
int main(void)
{
   wdt_disable();//Disable Watchdog
   sei(); //Enable Interrupts
   PLLCSR &= ~_BV(PCKE); //Set Synchronous mode (disable PLL)
   
   DDRB  = _BV(PB4); //Make the Right pin (PB4) an output
   
   
   GTCCR  = _BV(PWM1B); //Enable PWM 1B
   GTCCR |= _BV(COM1B1) | _BV(COM1B0); //Only generate output on the standard not the inverted pin
   
   OCR1C = 254;    //Governs the frequency of PWM
   OCR1B  = 180;  // Governs Duty Cycle (180 ~75% of 256)
   
   TCCR1  = _BV(CS10); //No Prescaler.
   //Since the PLL is not enabled this should be in ref. to cpu clock.
   
   

    while(1)
    {
      //ALL hardware!
   }   
   

}

// Input/Output Ports initialization
// Port B initialization
// Func5=In Func4=Out Func3=In Func2=In Func1=In Func0=In
// State5=T State4=0 State3=T State2=T State1=T State0=T
PORTB=0x00;
DDRB=0x10;
...
// Timer/Counter 1 initialization
// Clock source: System Clock
// Clock value: 7372.800 kHz
// Mode: PWMB top=OCR1C
// OC1A output: Disconnected
// OC1B output: Non-Inv., /OC1B disconnected
// Timer1 Overflow Interrupt: Off
// Compare A Match Interrupt: Off
// Compare B Match Interrupt: Off
PLLCSR=0x00;

TCCR1=0x01;
GTCCR=0x60;
TCNT1=0x00;
OCR1A=0x00;
OCR1B=0x22;
OCR1C=0x33;

TCCR1 |= _BV(COM1A1) | _BV(COM1A0);