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 Posted: Apr 01, 2012 - 05:16 AM |
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Joined: Jan 14, 2010
Posts: 15
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abcminiuser wrote:
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thanks Smile
If it's any consolation, the Apps team in Norway were going nuts over this the other day. We'd love to see you port it to the XMEGA devices and use the hardware EBI and USART-SPI modules to see how well it performs, if you have the time.
- Dean 
i haven't any xmegas or a way to program them (i assume my simple programmer will not program them?) , sorry. I just got started with AVRs (having graduated from PICs - having 1 cycle/clock is so nice  ) |
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Posted: Apr 01, 2012 - 10:12 PM |
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Joined: Nov 09, 2001
Posts: 270
Location: Serbia
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bobgardner wrote:
Snake oil. Show me the code and the schematic for wiring up a ram stick.
http://dmitry.co/images/uARM.zip
This project is so brilliant! I wonder how much time will pass before it's used in some PIC vs AVR discussion.  |
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Posted: Apr 02, 2012 - 01:26 AM |
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Joined: Jan 14, 2010
Posts: 15
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Well, I used to be a pic guy (see my site, etc) But I've switched now. 4x faster at same speed helps a lot, but pics still do have some cool things avrs lack: self-programming from anyplace in flash instead of just last few pages, ability to use the reset pin as a gpio without making your life a pain when reprogramming, etc... but AVRs are faster, have easier memory map, simpler asm, and did i mention faster? so for 8-bit AVRs are my new thing. 16-bit dsPICs though are unbeatable (100MHz chip in a 20-pin DIP is cool).
This project would be almost impossible on a 8-bit pic though (it would be too slow) - I tried. on a dsPIC it works very fast |
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Posted: Apr 02, 2012 - 01:42 AM |
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Joined: Sep 04, 2002
Posts: 21390
Location: Orlando Florida
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| So there are at least two giant breakthroughs here... the big ram and the ARM interpreter. Is that ARM interpreter written in c or c++? OK, one more question.... who reads the sd card? The AVR or the interpreted ARM? I guess the next question is: would a JVM interpreter run java faster than the ARM interpreter runs compiled c for the ARM? "lines per second" or some metric like that. |
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Imagecraft compiler user
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Posted: Apr 02, 2012 - 03:13 AM |
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Joined: Jan 14, 2010
Posts: 15
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emulator is all c, ram access code is c + asm (c-only version code provided too but asm code is 10x faster)
avr accesses sd card, linux accesses it through a paravirtualized device (pvDisk)
I already have made a working jvm for avr and will publish it soon enough (it is much faster) and unlike the former attempts(nanovm, etc) i support synchronization, threading, proper garbage collection, all data types, interfaces, exceptions, etc
i just finished optimizing the ram routines, they can now read/write multiple bytes at a time, up to 256 per call. refresh is also optimized. refresh now takes up 28723 cycles every 64ms (1.87% of the cpu time at 24MHz). Ram read is now 16+12x cycles for x bytes. write is 21+12x - quite fast (1.92MB/s read 1.90MB/s write using 32 byte blocks at 24 MHz) |
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Posted: Apr 02, 2012 - 08:47 AM |
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Joined: Jan 23, 2004
Posts: 9878
Location: Trondheim, Norway
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Dmitry,
Do you think you could get this running on an XPLAIN-A1 board, with its hardware SDRAM controller and on-board 8MB SDRAM? It's half of what you quote in your article, but I imagine the 32MHz core speed with DMA and hardware memory refresh would more than make up for the smaller amount of RAM.
- Dean |
_________________
Atmel Studio 6.1 is now released, grab it here.
Report AS6/ASF bugs here.
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Posted: Apr 02, 2012 - 09:40 AM |
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Joined: Jan 14, 2010
Posts: 15
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| anything under 10KB ram is a bit difficult (no icache) so if that board comes with a micro that has 16KB of ram or more, it'll work just fine |
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Posted: Apr 02, 2012 - 09:49 AM |
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Joined: Jan 23, 2004
Posts: 9878
Location: Trondheim, Norway
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Unfortunately it's only got 8KB of internal SRAM, but it also has 8MB of onboard SDRAM - which is mappable to the internal memory space.
- Dean |
_________________
Atmel Studio 6.1 is now released, grab it here.
Report AS6/ASF bugs here.
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Posted: Apr 02, 2012 - 11:16 AM |
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Joined: Dec 29, 2010
Posts: 466
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abcminiuser wrote:
Unfortunately it's only got 8KB of internal SRAM, but it also has 8MB of onboard SDRAM - which is mappable to the internal memory space.
- Dean :twisted:
this sounds like a job for the new xmegas with 32k sram!
Also, don't forget the X1 EBI controller has simultaneous support for SD RAM and SRAM ...
Last thing I would like to mention, why didn't Dmitry use an older Linux kernel? If I'm not mistaken, aren't there 16 bit binaries still around? |
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Posted: Apr 02, 2012 - 01:27 PM |
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Joined: Dec 30, 2004
Posts: 9001
Location: Melbourne,Australia
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| Dmitry emulated an ARM processor. ARMs arent 16 bit, so no binaries for ARM in 16 bit exist. Besides, what benefit would an older kernel provide? |
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Posted: Apr 02, 2012 - 01:30 PM |
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Joined: Jul 18, 2005
Posts: 62934
Location: (using avr-gcc in) Finchingfield, Essex, England
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Quote:
ARMs arent 16 bit
Not even in Thumb mode?   |
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Posted: Apr 02, 2012 - 01:55 PM |
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Joined: Dec 29, 2010
Posts: 466
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Kartman wrote:
...Besides, what benefit would an older kernel provide?
No less benefit than emulating a new kernel...LOL! |
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Posted: Apr 02, 2012 - 04:14 PM |
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Joined: Dec 16, 2005
Posts: 3095
Location: Bratislava, Slovakia
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clawson wrote:
Quote:
ARMs arent 16 bit
Not even in Thumb mode?
This (the instruction bus width) is what ARM (the CM-variety where's no escape from Thumb) and AVR have in common. Quite surprisingly.
JW |
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Posted: Apr 02, 2012 - 05:18 PM |
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Joined: Jan 14, 2010
Posts: 15
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Thumb is not 16-bit in any reasonable sense. It is just a collection of most commonly-used instructions in 32-bit-length, shrunk down to 16-bit length (think of it as huffman-coding the instruction stream, with an input symbol length of 32bits and symbol index as 16 bits). The registers are still 32 bit as are all operations. My emulator does support Thumb.
I did manage to run it in 8K just now, so i guess it will work on the XMega
Once I finished the emulator, i picked a random recent kernel and built it (I stared working on this project a while ago). The whole point was to boot a modern OS |
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Posted: Apr 08, 2012 - 12:36 PM |
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Joined: Oct 07, 2002
Posts: 2058
Location: Denmark
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You must have to much time!
But a great job
I'm a bit surprise that it run that slow!
When I was playing with a AVR emulator on a AVR it could run in about 1/25 of the real speed!
but you are running about 100 times slower than that!
What is killing you?
read RAM
decode instruction
execute the instruction
handling of flags
handling of registers
special code for R14 and R15
or ???
Perhaps you could tell how many clk's you use in the different instructions phases, and perhaps I have some ideas to speed it up.
Jens |
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Posted: Apr 08, 2012 - 01:20 PM |
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Joined: Dec 30, 2004
Posts: 9001
Location: Melbourne,Australia
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| I'd guess emulating the mmu will chew up a few cycles. Nothing like having hardware to do the grunt work. |
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Posted: Apr 09, 2012 - 10:32 AM |
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Joined: Oct 07, 2002
Posts: 2058
Location: Denmark
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| yes one way to speed it up would be to have one AVR to run the ARM emulator, and one to do the memory stuff. |
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