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 Posted: Dec 10, 2011 - 07:33 PM |
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Joined: Dec 10, 2011
Posts: 58
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How to force the C compiler to generate a HEX (ASM) code with hardware multiplication (MUL), for Atmega128?
Stepping into the dissasembly window ( Avr Studio 4.18 ) I do not see any kind of MUL mnemonic despite the fact my C program has multiplications like: float*float or int*float. |
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Posted: Dec 10, 2011 - 07:46 PM |
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Joined: Oct 29, 2006
Posts: 2758
Location: Sweden
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| The hardware multiplier is 8 bits x 8 bits with 16 bit result placed in r0 and r1. |
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Posted: Dec 10, 2011 - 08:11 PM |
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Joined: Jul 18, 2005
Posts: 62371
Location: (using avr-gcc in) Finchingfield, Essex, England
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Which C compiler are you talking about?
I use avr-gcc and if I compile:
Code:
#include <avr/io.h>
volatile uint8_t a, b;
int main(void) {
PORTB = a * b;
}
I get:
Code:
PORTB = a * b;
84: e8 e3 ldi r30, 0x38 ; 56
86: f0 e0 ldi r31, 0x00 ; 0
88: 90 91 61 00 lds r25, 0x0061
8c: 80 91 60 00 lds r24, 0x0060
90: 98 9f mul r25, r24
92: 80 2d mov r24, r0
94: 11 24 eor r1, r1
96: 80 83 st Z, r24
within which MUL is clearly being used.
Maybe your C compiler is different?
If I change the code to be:
Code:
#include <avr/io.h>
volatile uint8_t a;
volatile float b;
int main(void) {
PORTB = a * b;
}
I get:
Code:
PORTB = a * b;
88: 08 e3 ldi r16, 0x38 ; 56
8a: 10 e0 ldi r17, 0x00 ; 0
8c: 80 91 64 00 lds r24, 0x0064
90: 88 2f mov r24, r24
92: 90 e0 ldi r25, 0x00 ; 0
94: aa 27 eor r26, r26
96: 97 fd sbrc r25, 7
98: a0 95 com r26
9a: ba 2f mov r27, r26
9c: bc 01 movw r22, r24
9e: cd 01 movw r24, r26
a0: 0e 94 9f 00 call 0x13e ; 0x13e <__floatsisf>
a4: dc 01 movw r26, r24
a6: cb 01 movw r24, r22
a8: 20 91 60 00 lds r18, 0x0060
ac: 30 91 61 00 lds r19, 0x0061
b0: 40 91 62 00 lds r20, 0x0062
b4: 50 91 63 00 lds r21, 0x0063
b8: bc 01 movw r22, r24
ba: cd 01 movw r24, r26
bc: 0e 94 03 01 call 0x206 ; 0x206 <__mulsf3>
c0: dc 01 movw r26, r24
c2: cb 01 movw r24, r22
c4: bc 01 movw r22, r24
c6: cd 01 movw r24, r26
c8: 0e 94 71 00 call 0xe2 ; 0xe2 <__fixunssfsi>
cc: dc 01 movw r26, r24
ce: cb 01 movw r24, r22
d0: f8 01 movw r30, r16
d2: 80 83 st Z, r24
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Posted: Dec 10, 2011 - 08:22 PM |
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Joined: Oct 29, 2006
Posts: 2655
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claxon wrote:
How to force the C compiler to generate a HEX (ASM) code with hardware multiplication (MUL), for Atmega128?
Stepping into the dissasembly window ( Avr Studio 4.18 ) I do not see any kind of MUL mnemonic despite the fact my C program has multiplications like: float*float or int*float.
You are probably stepping over the library functions that contain the MULs. |
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Michael Hennebry
Iluvatar is the better part of Valar.
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Posted: Dec 10, 2011 - 08:23 PM |
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Joined: Dec 10, 2011
Posts: 58
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OK, thank you.
Finally I copied the entire assembler code in Microsoft Word and searched for MUL. I found a few instances like this: MUL R24,R20
They are not easy to find by running the code step by step. |
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Posted: Dec 10, 2011 - 09:56 PM |
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Joined: Jul 18, 2005
Posts: 62371
Location: (using avr-gcc in) Finchingfield, Essex, England
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Quote:
They are not easy to find by running the code step by step.
Why? |
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Posted: Dec 11, 2011 - 11:54 PM |
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Joined: Nov 11, 2003
Posts: 3904
Location: Chicago Illinois USA
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Well, he's multiplying floats, which means to multiply the, rather large, mantissas and add the exponents.
Not sure if it'd be reasonable to use the 8 by 8 bit multiplier when multiplying the two mantissas.
Hmm, what would be the plural of mantissa.. mantissae?
I've been programming since 19mumblemumble and I don't think I've had much cause to use floating point numbers except in fractals or linear algebra figuring 3d images. What are you doing with a microcontroler that integer math wouldn't be more effective with? |
_________________
Discursive design,
Torby
Some days, it's just not worth chewing through the restraints.
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Posted: Dec 12, 2011 - 02:10 PM |
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Joined: Feb 19, 2001
Posts: 25923
Location: Wisconsin USA
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Quote:
I found a few instances like this: MUL ...
Just for fun, I forced a float*float in a CodeVision test program. The resulting program had 9 uses of MUL. It would take further analysis to see if they are used on every path through the code. |
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Posted: Dec 12, 2011 - 04:21 PM |
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Joined: Sep 04, 2002
Posts: 21274
Location: Orlando Florida
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| Imagecraft compiler has 2 sets of libraries. Small avrs dont have a hw multiply, and they get linked with a lib that uses a shift and add 16x16 mult. AVRs with mult inst get a lib that uses the 8x8 hw mult for a 16x16 mult.... 0x1234 x 0x5678 mult algo is: mult the lo bytes (34x78) then (12x78) then (34x56) then (12*56) all added up with some shifting. Anyway, its a little faster. FP mult is similar, but a 24x24 mult I suppose. |
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Imagecraft compiler user
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Posted: Dec 12, 2011 - 06:52 PM |
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Joined: Jun 19, 2002
Posts: 957
Location: SF Bay area
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| While I think I understand it in principle, is there a nice writeup somewhere on how to implement an N*M bit multiply/divide/etc given only 8bit multiply hardware? |
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Posted: Dec 12, 2011 - 07:40 PM |
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Joined: Feb 19, 2001
Posts: 25923
Location: Wisconsin USA
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Quote:
While I think I understand it in principle, is there a nice writeup somewhere on how to implement an N*M bit multiply/divide/etc given only 8bit multiply hardware?
It works just like you learned multi-digit divide in 3rd grade with pencil and paper.
A compiler will also need to handle the different combinations of signed/unsigned.
What is your question in particular? Short answer is to do what was done above--fire up your favourite compiler and look at the generated code. |
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Posted: Dec 12, 2011 - 08:26 PM |
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Joined: Sep 04, 2002
Posts: 21274
Location: Orlando Florida
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| Its similar to multiplying multidigit numbers in base 10. You take the least significant digit on the bottom, mult it by the least significant digit on the top, add into product. Then ls dig on bottom x ms digit on top, add into product after shl one digit worth. When multiplying binary bytes, that would be 8 bits.. |
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Imagecraft compiler user
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