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 Posted: Oct 27, 2011 - 10:35 AM |
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Joined: May 15, 2010
Posts: 16
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Hello
For some reason I cant clear the watchdog using the new wdt4 driver. so my board is restarting periodcly.
I am setting the WDT in basic mode, for 3 second timeout. (using the framwork functions)
Any ideas? what am i doing wrong? |
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Posted: Oct 27, 2011 - 12:01 PM |
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Joined: Jan 14, 2007
Posts: 1836
Location: Nantes, France
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UC3C wdt can also be configured in the fuses or the first word of the flash user page, might worth to take a look.
-sma |
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Posted: Nov 02, 2011 - 11:49 AM |
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Joined: May 15, 2010
Posts: 16
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If I do full chip erase, thus fuses are not relevant, are they?
And, is what is the behaviour of the JTAG with the WDt, becouse for some reason, doing breakpoint couse the WDT to reset the chip... |
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Posted: Nov 02, 2011 - 03:41 PM |
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Joined: Aug 25, 2011
Posts: 392
Location: Europe
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matan_h wrote:
And, is what is the behaviour of the JTAG with the WDt, becouse for some reason, doing breakpoint couse the WDT to reset the chip...
Well, if you place a breakpoint, your program’s execution will be interrupted and thus the WDT won’t be reset in time. So it’s to be expected that the WDT will reset your chip. 
I guess you’ll have to disable the WDT while debugging. |
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Posted: Nov 02, 2011 - 06:25 PM |
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Joined: May 15, 2010
Posts: 16
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Are you sure? how does the peripheals works on JTAG PAUSE? aren't they pause too?
In another UC3A (the original Q is about new UC3C... with wdt4) device I can debug even if the wdt is working.... I mean that he is not disabled, but fully functional, and will do reset if no wdt_clear is done. |
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Posted: Nov 03, 2011 - 05:25 PM |
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Joined: Aug 25, 2011
Posts: 392
Location: Europe
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| I’m not sure about that JTAG PAUSE does exactly, but when my programs hit a breakpoint, all peripherals continue working in the background: The counters keep counting and the PDCA keeps transferring data to the USART. |
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Posted: Nov 11, 2011 - 04:03 PM |
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Joined: May 15, 2010
Posts: 16
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In the uc3c the debug functionalities grown (relative to uc3a, that I used).
I gess the the new feature of running peripheral in debug mode cause my system to re-run even when breakpoint is active. because interrupts are latching it back to run.
I noticed in the technical reference manual there is "peripheral debug register" that can stop thus periphral.
I can see that "peripheral debug register" can disable thus modules, but I cant find his location. Is it JTAG register? (not mapped in the AVR itself). |
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Posted: Nov 11, 2011 - 04:06 PM |
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Joined: May 15, 2010
Posts: 16
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About the wdt clearing issue. there is bug in asf 2.7:
in wdt_clear() there:
while(!(AVR32_WDT.sr & AVR32_WDT_CLR_WDTCLR_MASK));
that is wrong!!!!
it shuold be:
while(!(AVR32_WDT.sr & AVR32_WDT_SR_CLEARD_MASK));
I got response from atmel that I am correct.
I dont understand how they checked the FW with this bug... |
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Posted: Nov 14, 2012 - 04:35 PM |
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Joined: Oct 01, 2010
Posts: 12
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matan_h wrote:
About the wdt clearing issue. there is bug in asf 2.7:
in wdt_clear() there:
while(!(AVR32_WDT.sr & AVR32_WDT_CLR_WDTCLR_MASK));
that is wrong!!!!
it shuold be:
while(!(AVR32_WDT.sr & AVR32_WDT_SR_CLEARD_MASK));
I got response from atmel that I am correct.
I dont understand how they checked the FW with this bug...
*Please* spell your corrections right... your wrong spelling of the new term sent me on several wild goose-chases. The proper fix has:
AVR32_WDT_SR_CLEARED_MASK
as a defined term... your term was not defined. If you use cut and paste things generally work out better, I've found. |
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