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 Posted: Sep 28, 2009 - 05:21 AM |
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Joined: Jun 10, 2007
Posts: 53
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Dear guyz i m getting a crrupeted zip from the link geven above? wht shld i do now?
I just downloaded the zip file myself and it came in just fine. Maybe try again??
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is anyone one here writing bascom scripts for atmega48?
Sorry, I don't do bascom. Maybe someone else would be interested?
HTH. |
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Posted: Sep 02, 2010 - 02:28 AM |
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Joined: Aug 26, 2010
Posts: 15
Location: Egypt
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Posted: Sep 05, 2010 - 10:23 AM |
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Joined: Mar 04, 2010
Posts: 31
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Posted: Sep 20, 2010 - 07:39 AM |
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Joined: Sep 20, 2010
Posts: 1
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| i cant download the link either...the download never starts....can you upload it again please? |
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Posted: Oct 02, 2010 - 09:57 AM |
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Joined: Oct 02, 2010
Posts: 1
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bolterX wrote:
i cant download the link either...the download never starts....can you upload it again please?
I cant download it either  can you please put it again? thanks. |
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Posted: Oct 02, 2010 - 02:29 PM |
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Joined: Jul 18, 2005
Posts: 62365
Location: (using avr-gcc in) Finchingfield, Essex, England
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Posted: Oct 05, 2010 - 06:19 AM |
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Joined: Jun 10, 2007
Posts: 53
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| Thanks for re-hosting the files, but I really can't figure out the problem. I just tried again to download them and they came down with no problem. People do understand they have to log in, right? That's the only thing I can think of that might be wrong. |
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Posted: Oct 05, 2010 - 10:01 AM |
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Joined: Jul 18, 2005
Posts: 62365
Location: (using avr-gcc in) Finchingfield, Essex, England
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| Yeah it's odd - the very fact that I've rehosted them means I went to the first post and downloaded them - it worked for me. I would agree that the posters to this thread probably weren't logged in when they tried to download them EXCEPT that to post here they have to be logged in?!? (unless they try to download when not logged in then actually log in to post without bothering to try and download again?) |
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Posted: Jul 14, 2011 - 05:01 PM |
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Joined: Oct 14, 2010
Posts: 3
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Hi
I'm not able to download the pdf writeup. It abruptly stops after a while downloading. Please send me one if somebody has it.
thanks |
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Posted: Jul 14, 2011 - 05:16 PM |
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Joined: Jul 18, 2005
Posts: 62365
Location: (using avr-gcc in) Finchingfield, Essex, England
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Quote:
It abruptly stops after a while downloading. Please send me one if somebody has it.
Did you try my link above:
http://www.wrightflyer.co.uk/Using%20AVR%20Counter.pdf
I just downloaded the one from the first post and refreshed that to make sure it's up to date - works for me.
Cliff |
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Posted: Jul 14, 2011 - 05:29 PM |
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Joined: Oct 14, 2010
Posts: 3
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| thanks it did work for me. |
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Posted: Jul 31, 2011 - 01:48 PM |
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Joined: Jul 18, 2011
Posts: 6
Location: Croatia
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I have a question concerning PWM. I've read the tutorials and i have a question. Maybe it's written in the tutorial but i either missed it or failed to understand.
if i set a counter to Phase correct PWM and counting to top(0xff in 8 bit counter) and set OCR1A(e.g.) to 0 what kind of wave will be generated on OC1A if i specified that it is reset on count up and set on count down. |
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"If what you have done yesterday still looks big to you, you haven't done much today. - Mikhail Gorbachev"
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Posted: Jul 31, 2011 - 05:20 PM |
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Joined: Nov 17, 2004
Posts: 13852
Location: Vancouver, BC
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In the data sheet under the timer mode you are interested in there will be a statement something like this:
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The extreme values for the OCR0A Register represent special cases when generating a PWM waveform output in the phase correct PWM mode. If the OCR0A is set equal to BOTTOM, the output will be continuously low and if set equal to MAX the output will be continuously high for non-inverted PWM mode. For inverted PWM the output will have the opposite logic values.
Be sure to check the data sheet of the AVR that you are using since this might not be the same for all models, and it certainly is not the same for all modes. |
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Regards,
Steve A.
The Board helps those that help themselves.
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Posted: Jul 31, 2011 - 09:47 PM |
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Joined: Jul 18, 2011
Posts: 6
Location: Croatia
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| Thank you. It says exactly the same. i menaged not to see it somehow :S |
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"If what you have done yesterday still looks big to you, you haven't done much today. - Mikhail Gorbachev"
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Posted: Jan 27, 2012 - 04:12 AM |
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Joined: Jan 27, 2012
Posts: 1
Location: Mexico
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Posted: May 01, 2012 - 08:03 AM |
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Joined: Feb 04, 2007
Posts: 125
Location: Naples province, Southern Italy
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Figure 8 (Correction Phase/Frequency PWM) seems to fix.
I know: greater OCRxA/B, greater duty cicle (not inverted mode). |
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My (HW && SW) Setup: (MyAVR USB Programmer | bread-board | Butterfly | Arduino 10k | ATtiny2313 | ATmega8) && (WinAVR | AVR asm | AVRstudio)
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Posted: May 01, 2012 - 03:31 PM |
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Joined: Nov 17, 2004
Posts: 13852
Location: Vancouver, BC
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| Your post is very unclear, but if you mean that you think the diagram does not match the code, you are wrong. The code has the output being set on up-count and clear on down count, which means that the duty cycle decreases when OCRxA/OCRxB increases. |
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Regards,
Steve A.
The Board helps those that help themselves.
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Posted: May 02, 2012 - 08:48 AM |
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Joined: Feb 04, 2007
Posts: 125
Location: Naples province, Southern Italy
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Koshchi wrote:
The code has the output being set on up-count and clear on down count, which means that the duty cycle decreases when OCRxA/OCRxB increases.
Yes, in the last example (P&F corrected PWM) it uses "inverted mode" in source code (instead of "not inverted mode" used previously) but without inform the reader. |
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My (HW && SW) Setup: (MyAVR USB Programmer | bread-board | Butterfly | Arduino 10k | ATtiny2313 | ATmega8) && (WinAVR | AVR asm | AVRstudio)
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Posted: May 07, 2012 - 10:54 AM |
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Joined: May 27, 2010
Posts: 396
Location: The land of Cyrus the Great
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It may be useful to know that there is a general problem on word BOTTOM in AVR datasheets when describing the time of OCRx update and setting timer overflow flag.
In fast pwm mode, updating OCRx at BOTTOM means "updating OCRx when entering the BOTTOM (at the same timer clock cycle as the TCNTx is cleared)".
But in phase-frequency correct pwm mode, updating OCRx at BOTTOM means " updating OCRx when leaving the BOTTOM (at the same timer clock cycle as the TCNTx is going from BOTTOM to BOTTOM +1)".
Also timer overflow flag is set when moving from MAX or TOP to BOTTOM (entering zero) in normal, CTC and fast pwm modes.
But this is not the case for phase correct and phase-frequency correct pwm modes and the overflow flag is set when moving from BOTTOM to BOTTOM+1 (leaving zero and entering 1).
Therefore by assuming TCNTx=0, only one clock will set the overflow flag in phase-frequency correct pwm mode, because of moving TCNTx from BOTTOM to BOTTOM+1.
Atmel simply writes "BOTTOM" for all timer modes. I have informed atmel support about this problem but:
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Dear Customer,
The word "BOTTOM" in timer context refers to the lowest possible count in the timer which is 0x00. In all the timer modes, the overflow flag will be set after the timer reaches the TOP value. Can you please specify the datasheet and the section where you found the discrepancy?
Apparently, they need to read their datasheets at first. |
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Ozhan K.
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Posted: May 08, 2012 - 07:01 AM |
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Joined: Nov 17, 2004
Posts: 13852
Location: Vancouver, BC
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| The overflow flag is always set on the clock after the specified value (TOP or BOTTOM) is reached. This is the same in all cases, so I don't believe that there is an inconsistency here. However, the update of OCRxx for Fast PWM should be TOP to be consistent, especially since the overflow and the update happen on the same clock. |
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Regards,
Steve A.
The Board helps those that help themselves.
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