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AT32AP7000

Availability: Sampling

Summary

AVR32 based 32-bit MCU/DSP Vectored multiplier co-processor, 32 KB on-chip SRAM, 16 KB instruction and 16 KB data caches, MMU, DMA controller. Peripherals include a 16-bit stereo audio DAC, 2048x2048 pixel TFT/STN LCD controllers, 480 Mbps USB 2.0 with on chip transceivers (PHY) and, two 10/100 Ethernet MACs. Serial interfaces include RS232, USART, I2S, AC97, TWI/I2C, SPI, PS/2 and several synchronous serial modules (SSC) supporting most serial communication protocols.

Comments

AP7000 homepage

Overview features

SRAM	Volts
32KB	1.8 - 3.3V

Files

AT32AP7000 Preliminary Complete [4448.86 KB] (May 11, 2006)
AVR32 Architecture Manual [1488.01 KB] (Mar 28, 2006)

Packages

General package info

	256-CABGA
Package Lead Code	256
Carrier Type	TRAY
Max Package Height	1.4
Body Thickness	1.4
Body Width	17
Body Length	17
JEDEC MSL
Units per Carrier	90
Carriers per Bag	10
Units per Bag	900
Quantity per Reel	500
Tape Pitch	24
Tape Width	24
Downloadable Files

Other features

Tools

Memory
SRAM Data Memory	32K B
General Purpose Registers (Accumulators)	Yes
Serial I/O
2-wire Serial Interface (I2C compatible)	Yes
Full Duplex Serial Peripheral Interface (SPI)	Yes
Full Duplex UART	Yes
Full Duplex USART	Yes
Universal Serial Interface	Yes
MCU Specific
Supply Voltage	1.8 - 3.3 V
Interrupts, External pins	Yes
Sleep Modes	Yes
On Chip Oscillator	Yes
Software Programmable Clock Divider	Yes
I/O Pins	Yes
Power-on Reset	Yes
Interrupt or Wake-up on Pin Change	Yes
Interrupts	Yes
On-Chip Debug support via JTAG port	Yes
IEEE 1149.1 (JTAG) Boundary Scan	Yes
LCD controller	Yes
Timers / Counters
Watchdog Timer with On-chip Oscillator	Yes
Real Time Counter	Yes
Pulse Width Modulator	Yes

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