XMega32E5 - capture on cascaded TCC4+TCC5

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I'd like to set up TCC4 and TCC5 as a cascaded 32 bit timer, with pin-based capture. Where I'm getting stuck is how to configure the event system to both handle the 16 bit overflow *and* propagate the capture. I've preliminarily set up channel 0 as the capture channel (triggered by a rising edge on C0) and channel 1 as the overflow from TCC4. I can't grok how to set up TCC5 to perform an UPDOWN on event 1 and a CAPTURE on event 0.

 

I'm writing the software in advance of the arrival of the hardware, so all of this is theoretical at the moment.

 

EDIT: Never mind... I am supposed to set up TCC5 to *clock* from event channel 1 and use channel 0 as the capture trigger for both.

Last Edited: Thu. Jun 15, 2017 - 12:13 AM
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#include <avr/io.h>
#include <avr/interrupt.h>

int main(void)
{
	// PORT SETUP
	PORTC.PIN0CTRL = PORT_ISC_RISING_gc;

	// EVENT SETUP
	// EV0:CCA
	// EV1:CCB(no use)
	// EV2:CCC(no use)
	// EV3:CCD(no use)
	// EV4:TCC4 OVF
	EVSYS.CH0MUX = EVSYS_CHMUX_PORTC_PIN0_gc;
	EVSYS.CH4MUX = EVSYS_CHMUX_TCC4_OVF_gc;

	// TCC5 SETUP
	TCC5.PER = 0xFFFF;
	TCC5.CNT = 0;
	TCC5.CTRLE = TC_TC5_CCAMODE_CAPT_gc;
	TCC5.CTRLD = TC5_EVDLY_bm | TC_TC5_EVSEL_CH0_gc;
	TCC5.CTRLA = TC_TC5_CLKSEL_EVCH4_gc;

	// TCC4 SETUP
	TCC4.PER = 0xFFFF;
	TCC4.CNT = 0;
	TCC4.CTRLE = TC_TC4_CCAMODE_CAPT_gc;
	TCC4.CTRLD = TC4_EVDLY_bm | TC_TC4_EVSEL_CH0_gc;
	TCC4.CTRLA = TC_TC4_CLKSEL_DIV1_gc;

	sei();
    while (1) {
    }
}

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You don't want to set TC4_EVDLY_bm on TCC4, do you? You only do that on the high counter because of the overflow propagation delay.

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I'm sorry. I mistake.