why we need to set the flag bits in order to clear them

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What is the reason that we need to write 1 to the flag bit (TOV0, OCF0, ADIF etc) of AVR in order to clear it. I check the ATmega16 datasheet but was unable to find the reason.

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Well, the simple answer is "that's how it works!"  who knows why the engineers designed it that way,  agree, it seems back words or not logical, but at least it is documented and

how it must be done.  

 

 

JC

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I have been using AVR since last four years and doing the same (clearing flags by setting them). But, surely there should be a reason, why AVR designer kept it like that. Can someone please reveal the reality. smiley

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See these threads to start:

http://legacy.avrfreaks.net/inde...

http://legacy.avrfreaks.net/inde...

 

There is a link to a FAQ about this in the first thread, but I have no idea how to find it on the new site.  Or on the legacy.

 

 

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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Consider that the bits you write to are like a "reset button" for the flags: so, to reset a flag you activate (write '1') to its "reset button"...

 

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Simple answer is that a write is atomic and a RMW is not, so the former is safe but not the latter. The hardware could have been designed for a 1 or a 0, but a 1 is much more natural to most people.

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why AVR designer kept it like that.

And about 10 years BEFORE Atmel did it Motorola was doing the same thing. wink

John Samperi

Ampertronics Pty. Ltd.

www.ampertronics.com.au

* Electronic Design * Custom Products * Contract Assembly

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I recall a good thread on this many years ago, probably 10+.  I couldn't find it in my searching.  As I remember there was discussion on the reasoning behind it.

 

As with the OP, haven't thought much about it since--"just do it".  Upon reflection, is it true that it only works if the entire I/O register is flag bits, or if >>only one<< flag bit in an I/O register? (like ADIF and SPIF)  If, say, three flags and "other stuff", then working with the "other stuff" might clear the flag bits?  And the I/O registers need to be low, so that when working with the "other stuff", e.g. ADSC can't be a RMW or ADIF would be cleared, that SBI/CBI is used?  And then it still must be a modern AVR model, 'cause IIRC in old AVRs SBI/CBI >>was<< a RMW.  Starting to make my head hurt, now...
 

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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Thanks Theusch. The links you referred are really helpful. I understood the reason that why the designers have kept it that way