Which ATXMEGA128A1U-AU control register alternate PORTC pins to TWI Slave alternate function ?

Go To Last Post
7 posts / 0 new
Author
Message
#1
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Which ATXMEGA128A1U-AU control register alternate PORTC pins to TWI Slave alternate function ?

"XMEGA A Manual" PORT and TWI control registers don't look defining PORT pins for TWI Slave functionality.

Please help in finding me any other control registers multiplexing PORTC pins to TWI Slave alternate function !

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

I have a feeling that you have experience with STM32 or other ARM controllers where you have to tell the controller which pin should have which function.

 

The Xmegas work slightly different: All you have to do is enable the peripheral and where the pins are not bidirectional, you need to set up the data direction. Since TWI aka I2C is bidirectional, all there is to do is enable the TWI module, as stated in datasheet.

To enable the slave module, you need to do this at the very least:

TWIC.SLAVE.CTRLA|=TWI_SLAVE_ENABLE_bm;

 

And please do not double post:

http://www.avrfreaks.net/forum/h...

 

-Patrick

 

"Some people die at 25 and aren't buried until 75." -Benjamin Franklin

 

What is life's greatest illusion?"  "Innocence, my brother." -Skyrim

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Please do NOT start a second thread with the same topic.

Other Thread:

http://www.avrfreaks.net/forum/help-configuring-portc-alternate-function-twic-over-atxmega128a1u-au-will-be-highly

 

Moderator, please lock this Thread.

 

JC

Last Edited: Fri. May 5, 2017 - 07:05 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

JC,

 

Thanks your comments. Could you please help in merging the two threads together ? How to lock this thread ?

 

Appreciate any review comments on the following TWI Slave init procedure.

Still no TWI Slave interrupt received. There must be something missing in TWI Slave init.

 

TWISlaveInit()

{

...

 //PMSDA1/PMSCL1
  TWIC.CTRL = 0x00;
  TWIC.SLAVE.ADDR = 0x70;
  TWIC.SLAVE.ADDRMASK = 0x00;
  TWIC.SLAVE.CTRLA = 0xf9;

...

}

 

Sincerely,

Liu Wang

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Your code works for me, the interrupt is triggered. Did you configure the PMIC correctly and did you enable the interrupts?

 

Here's my working code:

#include <avr/io.h>
#include <avr/interrupt.h>
#include <avr/xmega.h>

ISR(TWIC_TWIS_vect)
{
	TWIC.SLAVE.STATUS|=TWI_SLAVE_APIF_bm;
}

int main(void)
{
	 TWIC.CTRL = 0x00;
	 TWIC.SLAVE.ADDR = 0x70;
	 TWIC.SLAVE.ADDRMASK = 0x00;
	 TWIC.SLAVE.CTRLA = 0xf9;

	 PMIC.CTRL |= PMIC_HILVLEN_bm |PMIC_MEDLVLEN_bm|PMIC_LOLVLEN_bm;
	 sei();

    while (1)
    {
    }
}

 

 

"Some people die at 25 and aren't buried until 75." -Benjamin Franklin

 

What is life's greatest illusion?"  "Innocence, my brother." -Skyrim

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

I did it the other way around (i.e locking http://www.avrfreaks.net/forum/h...). This thread seems to have slightly more content in it...

:: Morten

 

(yes, I work for Atmel, yes, I do this in my spare time, now stop sending PMs)

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

pawi777,

 

Appreciate your comment !  

Only low level was enabled in PMIC.CTRL.

Enabling all level interrupt resources fires TWI ISR now.

 

Own you a beer. Ping me when you are in town San Jose, CA, USA

 

Sincerely,

Liu