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I want to make a signal generator that control able by avr with below specification:

• 1 hz to 100 khz frequency
• square , sine , triangle, sawtooth waves

I search over and over whole internet and don't find a project can satisfy all up conditions and

I also try use of another IV beside avr such ICL8038 or XR2206 (but they are good to work with avr) and also AD9833 or AD9850 (but they don't generate sawtooth wave).

Can any one help me?

Last Edited: Sun. Oct 8, 2017 - 09:18 AM

What accuracy is required for the frequency?

What step-size when changing frequency?

What distortion is acceptable for the non-square waveforms?

'This forum helps those who help themselves.'

pragmatic  adjective dealing with things sensibly and realistically in a way that is based on practical rather than theoretical consideration.

bashid wrote:

I search over and over whole internet and don't find a project can satisfy all up conditions...

What does that tell you?

'This forum helps those who help themselves.'

pragmatic  adjective dealing with things sensibly and realistically in a way that is based on practical rather than theoretical consideration.

Brian Fairchild wrote:

What does that tell you?

Well it should tell us that Bashid wants "us" to do it for him... the way of this world I am afraid.

Ross McKenzie ValuSoft Melbourne Australia

The square waves are the easiest to make: you set a pin high, wait, then set the pin low, and repeat.  You will be able to get 100KHz square waves without much programming.

The creation of triangle waves, sawtooth waves, and sine waves will either use the Pulse-Width Modulation [PWM] section of the timer, or an external Digital-to-analog converter IC.  PWM turns on the port pin for a very brief time, then turns it off, and repeats.   A resistor and capacitor on the port pin will "smooth out" the on/off patterns into an average voltage level.  Changing the ratio of on/off determines the average voltage level.

For sawtooth waves, the average voltage level rises from zero to Vcc and then returns to zero.  Triangle waves have the average voltage level rises from zero to Vcc, then the sequence reverses and the average voltage level falls from to Vcc to zero.    You will not be able to reach 100KHz for using the PWM method for making triangle waves, sawtooth waves, and sine waves.

Creating a sine wave requires using a flash-based table of the PWM values that make the average voltage level.  For each step of the waveform, the program gets an indexed value from the table and creates an average voltage level.  Since the waveshape is symmetrical, you can make a table that has only the values for one quarter of the waveshape.  Start at Vcc/2 and go to Vcc, then reverse the order so  that you go from Vcc to Vcc/2.  Subtract Vcc/2 from the table's values to get the bottom half of the sine wave.  The faster the frequency; the more "jagged" the waveshape is.

The ICL8038 and XR2206 are analog ICs from the 1970s.  You will need to have an external Digital-to-analog converter IC to control them.  The  AD9833 or AD9850 ICs require extensive resistor/capacitor networks to support them.  You generally buy them on pre-manufactured "break-out" module boards and then integrate these boards to your design. They are best used for 100KHz to 10MHz waveform generation.

Some day we will set up a "homework" section of AVRfreaks so that students throughout the world can come here and get the code and documentation for all their various homework assignments.  Sure, the students don't "learn" their assignments, but it is more important to learn how to find the answer to problems on the web that others have done previously than it is to learn how to complete the assignments from the beginning.

valusoft wrote:
Well it should tell us that Bashid wants "us" to do it for him... the way of this world I am afraid.

;)  Often discussed over the years, especially in reference to Jesper's miniDDS.  What criteria does miniDDS >>not<< satisfy?

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

Last Edited: Sun. Oct 8, 2017 - 02:09 PM

miniDDS does have some compromises -- typically a "resistor DAC", and takes up the entire AVR during generation.

If I were given the task, I'd probably look at Xmega or other that have DMA and DAC.  Worked examples are out there

http://www.gabotronics.com/devel...

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

Last Edited: Sun. Oct 8, 2017 - 02:16 PM

The OP wants a top frequency of 100KHz. That leaves out PWM, in my book. Practically, that leaves DAC. Even so, you would be hard pressed to get more than 10 samples per cycle at the upper end with a 16MHz AVR.

That leaves XMega or some other faster chip.

The OP might also have more internet search success searching for: function generator

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

Last Edited: Sun. Oct 8, 2017 - 02:40 PM

Can any one help me?

As is usually the case, the Forum is better at giving guidance when you show what you have done so far.

Jesper's Mini-DDS was linked to above.

It uses carefully crafted code, some in ASM if I recall, to optimize the DDS output.

Most engineering and design is a series of trade-offs.

So perhaps your first version of your project omits the sawtooth waveform.

You will learn a lot about signal generators building your first version, and can apply that knowledge as you then work on Version 2, which perhaps has the sawtooth waveform included.

If you use the Analog Devices chip than you don't have to understand HOW a DDS signal is generated, although the data sheet does a nice job explaining it.

If you decide to program a micro to be a DDS, (Direct Digital Synthesis), signal generator, then you will have to do some reading to learn how it works.

Know that, except for the squarewave, the other signals are generally passed through a Low Pass Filter to remove the high frequency stairstep components to the signal.

If you want to work with the micro generating the signal, then consider the Xmega instead of the Mega or Tiny, as they have a built in DAC to convert the digital value directly to an analog voltage.

This means you don't need a separate DAC chip, and don't need to use PWM to generate the analog voltage.

I assume you have an O'scope?

You obviously need an O'scope in order to see the output signals that your project is generating.

How good are you with op-amps?

A typical signal generator has the ability to adjust the gain of the signal, as well as its DC offset, and as already mentioned the signal is generally fed through a LPF, (except for the squarewave).

In any event, building a signal generator is a great project!

The photo below shows my first surface mount PCB..., Not a great layout, but functional.

It was for the AD9833 chip!

The board has just the AD9833 chip and the 25 MHz clock installed.  The rest of the PCB is for the op-amps to filter and adjust the signal.

The micro was an old Olimex PCB.

These days I would use an Arduino Nano board for \$3.00

Speaking of Arduino, you might well fine an Arduino project that uses the AD9833, which would be a good starting point.

Once you know your hardware works you can write your own chip driver and user interface.

JC

bashid wrote:

I want to make a signal generator that control able by avr with below specification:

• 1 hz to 100 khz frequency
• square , sine , triangle, sawtooth waves

I search over and over whole internet and don't find a project can satisfy all up conditions and

I also try use of another IV beside avr such ICL8038 or XR2206 (but they are good to work with avr) and also AD9833 or AD9850 (but they don't generate sawtooth wave).

Can any one help me?

What Frequency stability, and precision ?

Start with a DDS design, as that has a Lookup table, that can store any waveshape you like.

As mentioned above, PWM is out for  100kHz, but there are new 'xTiny' AVR like ATtiny817/1617 series, that have a DAC, that specs 350ksps

The SO14 ATTINY1614-SSNR has plenty of flash and RAM, and 3 8b DACs

I cannot find a DAC slew rate spec ?  Has anyone tried the Step response of the xTiny DACs ??

I'm guessing that 350ksps relates to the large signal slew limit, and not the DAC update limit. ** See below

The DAC slew rate will determine the sawtooth flyback, and square wave rise/fall times.

A quick sanity check for 100kHz OUT on 20MHz MCU is 200 SysCLKs per full cycle.

If you assume a compact (say) 20 sysclk DDS style loop, that's 10 samples per full Sine/Triangle cycle, (too coarse to some) but a more tolerable 100 samples at 10kHz

If that is good enough for your needs, then that is the simplest to design, as it can use a fixed precision frequency source  (Xtal,  or TCXO)

An alternative approach for getting cleaner 100kHz, is to fast copy an RAM array to the DAC in a tight clock-paced loop. (1617 has 2K RAM)

To vary Fo you then must vary the MCU clock speed, or the RAM array size.

RC osc can be tuned via the Calibration Value, and the data has curves like

Figure 38-65. ATtiny1614/1616/1617: OSC20M Internal Oscillator: Calibration Stepsize vs Calibration Value (VDD=3V)

Figure 38-66. ATtiny1614/1616/1617: OSC20M internal Oscillator: Frequency vs Calibration Value (VDD=3V)

Looks like you can cover > 2:1 with a step size of 1~2% (6 bits), and the prescaler covers binary steps /1../64, & for slower than 64, you run a software loop

This has RC oscillator precision / stability / jitter, which may be good enough ?

If you run the array as (say) single-cycle 50-2000 bytes, the 50 gives the 100.00kHz (guessing 4 clks for RAM->DAC), 51 gives 98.039KHz and so on,

- steps and dF improve to 0.1% dF at 1000, or 5KHz fOut, and at some point, you could switch to DDS for lower frequencies.

By store of one sine/sawtooth cycle in the array, your playback/copy is very low jitter as all 'points' repeat exactly, whilst DDS gives finer resolution, but successive sines are not identical points.

or, you can store more than one cycle in the array, which means each cycle can have slightly varying points (similar now to DDS)

- 1000 bytes, storing 20 x ~50 sample Sine cycles of 100kHz, and 1001 bytes for 20 cycles gives 99.9kHz for 0.1% step size.

**  DAC 350ksps ?  The more I read, the more I think this is the upper update rate, (talks about Maximum Conversion Rate)  which would limit any AVR-DAC design to a poor 3.5 samples per period at 100kHz

They also say "By default, a conversion is started when new data is written to DATA, and the
corresponding voltage is available on the DAC output after the conversion time. It is also possible to enable events
from the Event System to trigger the conversion."
The SAMD11 DAC seems to be the same.

That's not like the SiLabs DAC's I am more used to, with those, I can INC  DAC_SFR for example, at a peak 36MHz rate and get a clean linear ramp out.

Last Edited: Sun. Oct 8, 2017 - 10:03 PM

Here is an idea of using two (or perhaps a dual) DDS to make a sawtooth wave

https://m.eet.com/media/1137495/71003di.pdf

When in the dark remember-the future looks brighter than ever.

In my application accuracy not so important : 1Hz accuracy is enough and a typical distortion is also acceptable.

Also 1~10 Hz step size is enough.

miniDDS satisfy my conditions but it is in asm code and i don't have enough time to learn asm coding and reverse it. is there any fasten way?

in all internet avr function gen that i see it is limit to 65 kHz and a 256 lookup table for every wave.

below link is also good solution,I read it but don't understand how it reach up to 100 kHz. Can you help me this code can satisfy my condition.

http://codeandlife.com/2012/03/1...

Jim

But it have just sine wave above 100 kHz.

bashid wrote:

in all internet avr function gen that i see it is limit to 65 kHz and a 256 lookup table for every wave.

Think about those numbers for a moment.

They have an upper frequency of 65kHz and in each full cycle at that frequency they have 256 steps. So...

65kHz x 256 = 16,640,000 Hz = 16.64MHz. Which is getting to be near to the maximum frequency an AVR will run at.

But that is for each output step which takes multiples AVR instruction cycles to achieve. The minimum number of AVR cycles is going to be something like 15 per step. So you would need an AVR running at around 100MHz. Which they can't.

20MHz (maximum AVR clock rate) / 15 (AVR instruction per output step) / 256 (number of output steps) = 5.2kHz.

See the problem?

'This forum helps those who help themselves.'

pragmatic  adjective dealing with things sensibly and realistically in a way that is based on practical rather than theoretical consideration.

Ok I understand it , So the way is use of an out IC for generate signal , such ad8933 or icl8038 or other,Yes?

bashid wrote:

Ok I understand it , So the way is use of an out IC for generate signal , such ad8933 or icl8038 or other,Yes?

Yes, but not the 8038 as it is a very old design and very difficult to interface with an AVR. Buy an AD8933 module from eBay. Get that working and then come back here with a question on how to much a sawtooth.

'This forum helps those who help themselves.'

pragmatic  adjective dealing with things sensibly and realistically in a way that is based on practical rather than theoretical consideration.

bashid wrote:

below link is also good solution,I read it but don't understand how it reach up to 100 kHz. Can you help me this code can satisfy my condition.

http://codeandlife.com/2012/03/1...

That looks very well presented, as it includes waveforms.

Which bit do you not understand ?

The waveforms are for 150kHz examples, and nicely show how granular things get, due to limited samples available within each sine.

The C array read is ~10 samples per sine, and the ASM read is ~15 samples per sine, at the 150kHz

bashid wrote:

In my application accuracy not so important : 1Hz accuracy is enough and a typical distortion is also acceptable.

Also 1~10 Hz step size is enough.

Easy to say...

1Hz accuracy is 10ppm at 100kHz, which is better than an off the shelf crystal. You are already into oscillator module precision territory.

Step Size is a speed trade off :  Let's run the ASM numbers, 16MHz,

step = round(100k * 256 * 256 * 7 / F_CPU)  = 2867

Fo=F_CPU / 7 / 256 * (step/256) = 99993.024

step = 2866

Fo=F_CPU / 7 / 256 * (step/256) = 99958.147

step = 2868

Fo=F_CPU / 7 / 256 * (step/256) = 100027.901

With the 16b adder used here, that's a Step Size of 34.877Hz at 16MHz, and  43.596Hz at 20MHz F_CPU

If that is too large a step size, then you need to use a 24b adder, which drops the Step Size to well under 1Hz, at a small cost in loop speed.

Keep in mind, that Sine wave outputs can use a filter, whilst Sawtooth and square tables, will have edge jitter. - ie that apparent fine frequency control, is only an average & does have a trade off.

If you want square/sawtooth without jitter, you need to create new code for those.

bashid wrote:

miniDDS satisfy my conditions but it is in asm code and i don't have enough time to learn asm coding and reverse it. is there any fasten way?

The C example works, but it is slightly slower / more granular.

Increase the clock speed to 20MHz makes 20MHz C roughly == to 16MHz ASM.

In most DDS examples, you do not need to learn ASM, just copy the code.

Or is this homework, and needs to be 'your own work' ?

bashid wrote:

in all internet avr function gen that i see it is limit to 65 kHz and a 256 lookup table for every wave.

256 lookup choice is done for speed - as you see above, only a ~10-15 of those possible 256 are used at the highest settings.

You could code TWO routines,  covering differing frequencies.

One tuned for speed uses 16b adder and 8b table index, and another could use 24b adder and 10b or more table index.

if i want to generate multiple waveform for example a 30 hz sine and a 300 hz triangle or sine and a 305 hz sine and so on . how can i do it with ad9833 ? probably i must buy for any waveform one AD9833.

this is never optimal!

Is there a better way?

can ARM microcontroller solve my problem?

Do you understand how a DDS oscillator works? No? I suggest you go and research them and then write some prototype code on your AVR. Now you will be able to answer your question.

'This forum helps those who help themselves.'

pragmatic  adjective dealing with things sensibly and realistically in a way that is based on practical rather than theoretical consideration.

But it is proved that with avr can not generate above wave up to 65 khz. How I must Do it?

I up and Down the internet and find no solution for my project and my situation.

Can anyone do some help?any keyword?any site? or anything else?

You've been told "DDS". Yes, it is in Asm, the reason for that is that the tighter you can make the core generation loop the higher the frequency you can generate.

There are some DDS chips (like AD9102), where you can define your own waveform shape.

also:

http://www.electronicdesign.com/analog/turn-dds-chip-low-frequency-arbitrary-signal-generator

how some equipment is doing it (rather than fixed table)

https://www.electronicproducts.com/Test_and_Measurement/Benchtop_Rack_Mountable/A_better_way_to_generate_arbitrary_waveforms.aspx

When in the dark remember-the future looks brighter than ever.

Last Edited: Mon. Oct 16, 2017 - 08:19 PM

bashid wrote:
I up and Down the internet and find no solution

So what, exactly, are you expecting to find?

....plus free shipping needed

When in the dark remember-the future looks brighter than ever.

bashid wrote:

But it is proved that with avr can not generate above wave up to 65 khz. How I must Do it?

Proved where ?

An AVR could generate some waveform faster than that, the example I linked worked 'sine' to 150kHz.

Of course at those values, you can see the granularity.

An external DAC looks to be needed with AVR, & small SAM devices,  but an EFM8LB1 could use their faster inbuilt DAC.

Triangle is less forgiving, as the much higher low-pass filter needed does not 'remove the steps' as much, and that makes the jitter more visible.

bashid wrote:

if i want to generate multiple waveform for example a 30 hz sine and a 300 hz triangle or sine and a 305 hz sine and so on .

You do not mean all at the same time, do you ?

If you want Sine/Triangle/(anything else), you simply fill a RAM array, and fast-copy that to the DAC.

DDS will give jitter on triangle waves, so jitter free Triangle DAC needs external clock, which means the highest performance hardware for what you want, would be EFM8LB1+Si5351A.

Modest operation can be met by Trim of RC_Osc setting, but that's not going to meet 10Hz  precision specs.

The Si5351A is a low cost i2c Clock generator, square wave, 2.5kHz~200MHz.

You then use that, to clock the MCU, which really is used as a simple fast Array-playback - frequency set is via Si5351A.

Calculating a new F value is not trivial, as the Si5351A has multiple registers and rules to meet.

Si5351A is quite popular, with an Adafruit breakout, so maybe someone has done what you want already ?

Last Edited: Tue. Oct 17, 2017 - 05:19 AM

Who-me wrote:
the example I linked worked 'sine' to 150kHz. Of course at those values, you can see the granularity.
While it's really a triangle not a sine by my guess the minimum points you need in a wave to make a sine is 5:

So to output 5 sample points for 150kHz needs you to operate at 750kHz. If the AVR runs at 16MHz then I guess that gives you 21 opcode cycles to prepare and output each sample point? That sounds "tight" to me and, like I say, that's 5 points which really makes it a triangle:

For it to be a "sine"surely you need at least something like 9 points? So for 150kHz that requires 1.35MHz and at 16MHz AVR speed that would mean just short of 12 opcode cycles per point? That is getting very tight indeed and even 9 sample points would be a pretty rough looking sine wave.

clawson wrote:

For it to be a "sine"surely you need at least something like 9 points? So for 150kHz that requires 1.35MHz and at 16MHz AVR speed that would mean just short of 12 opcode cycles per point? That is getting very tight indeed and even 9 sample points would be a pretty rough looking sine wave.

Yup - the link above shows 150KHz and an ASM optimized loop, that gives 15 samples points per sine. Still granular, and not quite enough for triangle/sawtooth.

You can code a simple table copy to DAC in fewer cycles again, but then need either coarser frequency steps, or some  external Clock that is Variable.

I really never tried it, but a chip with DMA might be able to transfer the samples from memory to the DAC automatically. One of these days I'll have to try on my SAMD10.

El Tangas wrote:

I really never tried it, but a chip with DMA might be able to transfer the samples from memory to the DAC automatically. One of these days I'll have to try on my SAMD10.

Be interesting to hear how that works.

My reading has the SAMD10 DACs the same as the AVRs and thus rather slow, but be good to know if they can be 'over-clocked' in any way. - ie just how fast can you feed Data into a DAC and have it follow, even at reduced ENOB.

avrcandies wrote:

There are some DDS chips (like AD9102), where you can define your own waveform shape.

Yup, looking at

http://www.analog.com/en/product...

and check for wording like

• On-chip 4,096 x 14 bit pattern memory

and the AD9102 (1 channel, 14b, 180MHz ) or AD9106 (4 channel, 12b 180MHz)  would leave a MCU DAC solution in their dust.

Of course, you do pay for that step-up in performance, but if you really want a good Sine/Triangle/Sawtooth generator to > 100kHz, these parts are way cheaper than the design time....

Some code even looks to be here

https://github.com/igbt6/DevLibs...

At 180MHz, that 100kHz example waveform will have 1800 sample points, over 100x better than an AVR coded version.

A Si5351A+EFM8LB1 for DAC, would manage 36MHz for 360 sample points on 100kHz, lower parts cost, but many hours of code...

The AD9106 TxDAC® and waveform generator is a high performance quad DAC integrating on-chip pattern memory (4096 × 12-bit)  for complex waveform generation with a direct digital synthesizer (DDS).

The DDS is a 12-bit output, up to 180 MHz master clock sinewave generator with a 24-bit tuning word allowing 10.8 Hz/LSB frequency resolution.

The DDS has a single frequency output for all four DACs and independent programmable phase shift outputs for each of the four DACs.

SRAM data can include directly generated stored waveforms, amplitude modulation patterns applied to DDS outputs, or DDS frequency tuning words.

An internal pattern control state machine allows the user to program the pattern period for all four DACs as well as the start delay within the pattern period for the signal output on each DAC channel.

An SPI interface is used to configure the digital waveform generator and load patterns into the SRAM.

There are gain adjustment factors and offset adjustments applied to the digital signals on their way into the four DACs.

The AD9106 offers exceptional ac and dc performance and supports DAC sampling rates up to 180 MSPS. The flexible power supply operating range of 1.8 V to 3.3 V and low power dissipation of the AD9106 make it well suited for portable and low power applications.

APPLICATIONS

• Portable instrumentation - Signal generators, arbitrary waveform generators

Nice sounding part, if anyone does a PCB with a clock choice, ( eg AD9106 + Si5351B/C)  I'd be tempted to buy one....  167.772160MHz gives a 10Hz LSB, and I presume 16.7772160MHz is valid, and gives 1Hz LSB for lower kHz outputs.

Last Edited: Tue. Oct 17, 2017 - 07:09 PM

A 10-bit sinewave (table in flash) generated by phase accumulator (24-bit adder) hard loop, no interrupts, written in (AVR) ASM code (no freq. adj.) -> loop takes 48 cycles (20 instructions) minimum @ 16 MHz (e.g. AT90PWM3) gives a signal frequency of ~333 kHz. With frequency adjustment takes 16 cycles more + sampling time ADC or fetching new sample (potm.) Other waveforms take about the same code size each.

Or create a DDS by using old/CMOS/TTL ICs, a 64k EPROM (data), an adder (phase accumulator, addresscounter etc.), watch this video clip: https://www.youtube.com/watch?v=...

Who-me wrote:

El Tangas wrote:

I really never tried it, but a chip with DMA might be able to transfer the samples from memory to the DAC automatically. One of these days I'll have to try on my SAMD10.

Be interesting to hear how that works.

My reading has the SAMD10 DACs the same as the AVRs and thus rather slow, but be good to know if they can be 'over-clocked' in any way. - ie just how fast can you feed Data into a DAC and have it follow, even at reduced ENOB.

According to the D21 datasheet, it can be clocked from DMA and supports up to 350k samples per second with 10-bit resolution.

My digital portfolio: www.jamisonjerving.com

My game company: www.polygonbyte.com

Thanks theush for linking to gabotronics oscilloscope , arbitrary form signal generator and protocol sniffer. I was very satisfied with it and it is very smart.

From their specifications, I noticed : the internal DAC works up to 1Ms/s, and generates signals up to 44 khz -ie a period of about 23 us (each sinusoid is sampled 23 times, or every 8 angular degrees)

I do not understand how DMA and DDS work together:

DMA executes, on a special controller

for (i=beginOfRamBlock; i < endOfRamBlock; i+=1)

{ send (Ram[i] ) to either ADC or R/2R port}

Main issue is counter is incremented by 1 and time between sending value to a DAC|(Port with R/2R ladder) is not specified : -I hope it is constant -, which makes frequency controlling very difficult... or much smarter than me unless one has to compute the values to be send -and manage they remain periodical : would make huge tables for low frequency- evry time frequency changes (I know it is off topic, as avr-s do not have DMA)

dbrion0606 wrote:

I do not understand how DMA and DDS work together:

Main issue is counter is incremented by 1 and time between sending value to a DAC|(Port with R/2R ladder) is not specified : -I hope it is constant -, which makes frequency controlling very difficult... or much smarter than me unless one has to compute the values to be send -and manage they remain periodical : would make huge tables for low frequency- evry time frequency changes (I know it is off topic, as avr-s do not have DMA)

The DMA approach is slightly different, so you would use DDS for lower frequencies, where finer increments matter more, and use fast-copy (either DMA or even SW loop unrolled) where you want more samples per cycle.

You do not use DMA and DDS at the same time.

To get desired freqs, it becomes like a playback machine, you can store a whole number of cycles in as much memory as the device has, and then play back.

Successive cycles do not have to produce identical plot points (same as DDS in that detail) but over the size of the memory, the points do repeat. (unlike DDS, where finer granularity is possible).

To change freq, you find the best-fit for N cycles in K bytes, and then play that back.

If you create the tables as-needed by calculation, that manages the size, but does mean code includes a Sin or Cos Floating point.

Usually, the loop repeat may take slightly longer, so that is chosen at a flat point of the waveform.

You do not use DMA and DDS at the same time

Thanks for this explanation -this is the very point which puzzled me- .

For sine wave (and cos) between 0..pi/2 , I bet a table (90 degree with a 5 degree step is a 19 items -int8 or int16-  array...)  can be generated from a PC -10|20 lines of x86 gcc-, hiding lack of FPU... calculation on the micro side would "only" consist of changing signs, use trigonometric identities and, in the worst case, interpolate...

Edited I forgot to thank you for answering a question I did not dare to ask (when updating tables, to avoid discontinuities, you wrote  they are updated at flat portions)....

Last Edited: Wed. Oct 18, 2017 - 10:24 AM

Some DMA controllers can be triggered by another peripheral, they don't need to always be working a full speed. So, a timer can be programed to trigger the DMA transfers at a certain rate. I think this is possible in the SAMD series, however navigating through 1000+ pages of datasheet is not easy, so I'm not 100% sure.

I bet it (giving a rate at a DMA transfer) is possible on Texas ARMs or -incl- STM32 (hard to find nowadays) ;

it does not seem possible on SAM3yyyyy (Arduino Due processor) , but I very fast read the doc before asking (and buying...) . Hope I missed something ....

but does mean code includes a Sin or Cos Floating point.

Or Cordic method & no floating pont!

When in the dark remember-the future looks brighter than ever.

I wonder what the OP really wants to achieve?

'This forum helps those who help themselves.'

pragmatic  adjective dealing with things sensibly and realistically in a way that is based on practical rather than theoretical consideration.

It sounds a bit slow, is the 10 bit a hole sine wave or just 1/4 ? (so output is 12 bit?)

And the 333kHz is only update rate, so very hard to make a 100kHz sinewave that way!

what do you really need?

just a "clean" tone or does it need to sweep etc.?

If just for tones and cheap go for jespers DDS, and two AVR's one in ASM you don't really need to know how it works (like a DDS chip), and then a 2. you programme in C, that sends commands.

And if you need more speed for jespers DDS the update loop can be faster. (that I can help with if you go that route).

the link to jespers DDS works, but the link to the code (and the rest) is dead, does any one have an other link or the code?

I found this on one of my drives...

Edit:

Jesper's Page

## Attachment(s):

David (aka frog_jr)

Last Edited: Wed. Oct 18, 2017 - 04:56 PM

Sin Wave is a little bit different than the other waveforms.

From a mathematical perspective, one needs only > 2 data points per period to generate a sin wave.

Exactly two points won't work, as they could both be at the zero crossings...

The sin is also the easiest waveform with which to generate a "clean", (no "noise" or "distortion").

One just has to feed the signal through a (good) LPF to remove the upper frequency harmonics and out comes a the clean sin wave.

With a triangle, ramp, sawtooth, Square, EKG, etc. waveform, one needs the higher frequency components of the signal to generate the signal.

An old rule of thumb was to use, (pass),  the first 10 harmonics of the primary frequency in the signal in order to get a good representation of a periodic signal.

For some waveforms, like those listed above, it is perhaps easier to look at how many data points per period one wants to generate the signal.

This is basically bouncing back and forth between the time domain analysis and the frequency domain analysis of the generated signal and the desired signal.

JC

If one needs sin, triangle, square waveforms on the same plug, maybe a lowpass filter, especially a good one,  would make things very complicated (if the frequency range is huge 10hz -100 khz).

I suppose a sinusoid has not too much distorsion if it is sampled every 8 degrees (making a 19 entries array, which is ridiculously tiny  with avrs :  table(s)  and c code can be generated on a PC, with Fortran/C/python supporting floats and file writing, ready to be included). This was deduced from gabotronics samplig rates vs maximum frequency of the generated wave. Clawson thought of 15 points , and, before reading gabotronics specifications, I thought of 10 points (half sinusoid sampled every 18 degrees and Clawson and Gabotronics made me change my mind).

Of course, this would induce unwanted frequencies. I suppose the noise (8 bits : is the size of a R-2R ladder on a single avr port) will hide these frequencies.

cordic algorithm https://en.wikipedia.org/wiki/CO... needs more tables (float items), and more code. I bet they are used in avr-libc math library...

thanks

this is the key part (r31 is the table selector).

```LOOP1:
lpm						; 3
out		PORTB,r0		; 1
rjmp	LOOP1			; 2 => 9 cycles
```

on bigger chips use Ram for look up save 1 clk

make the  code two times so the loop only cost 1 clk

only 16 bit can save an other clk.

so for a 20 MHz AVR it can be an update rate of 7 clk (24bit DDS) 2.86MHz or about 29 points on a 100KHz sine wave that could be ok!

But when the freq change there will be jitter! (it can be removed but need a long ugly code, unless 10 clk (or so) code is ok)

Last Edited: Wed. Oct 18, 2017 - 09:15 PM