Safe to interconnect ISP pins and TWI pins?

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I'm designing a circuit with an Atmega88, a 4 pin connector (for power supply and TWI) and an ISP interface.
Since space on the PCB is scarce I wondered if it would be OK to connect two of the ISP lines (let's say MOSI and MISO) with the connector pins that also go to SDA and SCL.
That way I could use my standard connector and just two additional wires for programming.

MISO ---> Connector Pin 1 <--- SDA
MOSI ---> Connector Pin 2 <--- SCL
GND  ---> Connector Pin 3
VCC  ---> Connector Pin 4
SCK  ---> Programming Pin 1
!RST ---> Programming Pin 2

My Questions:
- Am I right in thinking that since I'm not using SPI at all other than for programming, those pins should be tri-stated in normal operation?
- What exactly happens to all the other pins during programming? Can I safely program the chip with MISO and MOSI connected to SDA and SCL?

Thanks in advance,
Tobias

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Quote:

- What exactly happens to all the other pins during programming?

The processor is held in _RESET. The IO (apart from driven ISp lines) will be tristated.

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You really want at least 6 pins for ISP.

Vcc and Ground so the programmer "knows" that it is connected to an active board and what logic levels to apply.

Reset to put the MCU into the necessary reset state.

ISP-MISO, ISP-MOSI, ISP-SCK for the communication.

The only "maybe optional" is Vcc.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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clawson wrote:
Quote:

- What exactly happens to all the other pins during programming?

The processor is held in _RESET. The IO (apart from driven ISp lines) will be tristated.

Thanks clawson.
So it shouldn't matter if MISO/MOSI signals are also present at SDA respectively SCL during programming.

What about the other way around, do SDA/SCL signals on MISO/MOSI pins interfere with normal operation without peripheral hardware if SPI stays uninitialized?

Jim, thanks for your reply as well, but I think you misinterpreted my question. I know that I need 6 lines, the question is if SDA respectively SCL can share a common connector pin with ISP-MISO respectively ISP-MOSI without influencing functionality while programming or during operation.

Thanks again,
Tobias

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Be sure whatever else is connected to your TWI does not try to drive the lines while the processor is reset

274,207,281-1 The largest known Mersenne Prime

Measure twice, cry, go back to the hardware store

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Torby wrote:
Be sure whatever else is connected to your TWI does not try to drive the lines while the processor is reset
Not an issue since this is a slave device that is attached and powered via the connector. For programming I'll detach it, connect and power it from the programmer and put it back afterwards.

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To follow up on this here - and in case anyone else is looking for a solution like this - it did work, although I get a wrong device ID while programming. Thankfully, the device I get is a Mega88+LIN package (while I actually have a Mega88 connected) so by setting the target device to what I get from the µC I can program it. (A -F flag for avrdude should do the job as well.)

My guess is, that this behaviour could be remedied by using small series resistors on the I2C lines (see below).

Maybe I'll try that in a future revision. But as is, I'm quite happy with the solution.

 

MISO ---> Connector Pin 1 <--- R --- SDA
MOSI ---> Connector Pin 2 <--- R ---SCL
GND  ---> Connector Pin 3
VCC  ---> Connector Pin 4
SCK  ---> Programming Pin 1
!RST ---> Programming Pin 2