I am having a problem with the ADC hanging on EOC - All the examples I have found for the UC3 having it running at the internal clock or using PM for setting the clocks. I am using sysclk with a 12MHz oscillator that is multiplied by 16 and divided by 3 for cpu clock frequency of 64 MHz.
I understand that PBA drives the ADC clock. I tried setting #define CONFIG_SYSCLK_PBA_DIV to 10 - but then the LCD Display quite working.
Could someone please explain how to provide a 8 MHz ADC clock (running 8 bit conversions) with a 64 MHz main clock.
I am running an AT32UC3A1512 processor.