## DAC using PWM : Valid low pass filter?

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I am trying to learn how to design a DAC using PWM. Designing a low pass filter is new to me.

If you say you're not doing my homework for me I will be very pleased ... since I'm a couple of decades past that part of my life.

Assume I want a DAC with 10 bit accuracy using 16 bit timer.
* CPU (AT90USB646) frequency is 16 MHz.
* Using ten bit resolution 16-Bit timer

PWM Fundamental frequency (Fpwm)
= 16000000 / 1024 = 15625 Hz

Required minimum ripple (Astop)
= 6.02 * N + 1.76
= 6.02 * 11 + 1.76
= ~68 dB

First order filter (Fc)
= Fpwm / SQRT( ( 10 ^ Astop/20 ) ^ 2 - 1 )
= 15625 / SQRT( ( ( 10 ^ 68/20 ) ^ 2 ) - 1 )
= 15625 / 2500
= ~6 Hz

R (6 Hz) = 1 / (2 * PI * Fc * 10 uF)
= 1 / (2 * PI * 6 Hz * 10uF)
= ~2600 (2.7K) Ohms

So the low pass filter is R = 2.7K / C = 10 uF.

Am I applying these calculations properly or am I just not getting it?

Rick

--------------

My reference is Analog Circuits World Class Designs by Robert A. Peace. The chapter is called Working the Analog Problem From the Digital Domain by Bonnie Baker.

You will need some kind of filter to smooth a PWM signal. It tends to be an RC, not JUST a capacitor. You want the filter corner frequency (for a simple RC) given by 1/2*pi*R*C to be lower than about 1/10 of the repetition frequency of the PWM (duty cycle) signal. Then, the output will be approximately Vcc*DutyCycle into a open-circuit "load". Generally, you want a minimum R of about 1000 ohms when the source of the PWM is a logic output.

I'm not doing your homework for you...

krazatchu wrote:
I'm not doing your homework for you...
Ahhhhhhh. I remember going to the pub after exams, drinking too much beer, and then going to sleep (unconcious). I'd wake with my clothes in a heap and I was still in them. :-)

The calculation looks sound. Often one uses a second order filter instead. But then calculations are even more complicated.

rjburke377 wrote:

Quote:
If you say you're not doing my homework for me I will be very pleased ... since I'm a couple of decades past that part of my life.

:lol:
Very good !

It's not necessarily hard to use a second order filter: just put another RC after the first one, but make sure that the second R is 10 times higher than in the first filter: it will hardly have any effect on the first filter.

Nard

She is called Rosa, lives at Mint17.3 https://www.linuxmint.com/

Dragon broken ? http://aplomb.nl/TechStuff/Dragon/Dragon.html for how-to-fix tips

Plons (Nard) and Kleinstein, thank you for the help.

My reference book didn't mention the performance of this type of circuit, at least, not in terms I understand.

From the RC time constant Wiki I found that other useful equations are:
1: rise time (20% to 80%) tr = 1.4t
2: rise time (10% to 90%) tr = 2.2t

In my example the rise times would be:
1: 1.4 * 2.7K ohms * 10 uF = ~38 mS
2: 2.2 * 2.7K ohms * 10 uF = ~60 mS

Wow. This is slow compared to the MCP42010 digital pots I am currently using in my circuit. Am I calculating this correctly?

Rick

This ain't my bag either, but we've been using a dual-op-amp design plus some discretes in designs for several years. The second op amp stage is essentially for driving purposes. IIRC the circuit is almost exactly from a Microchip app note. In practice it doesn't seem to be sensitive to PWM frequency.

Lee

Hmmm--this one is only single op amp:
http://ww1.microchip.com/downloa...

This one has no op amps. lol
http://ww1.microchip.com/downloa...

Maybe it wasn't Microchip...

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

As long as the corner frequency of the filter is below about 1/10 of the PWM repetition frequency, it makes little difference as far as voltage "accuracy". Of course, the lower you make the filter corner frequency, the slower it is to step changes in PWM duty cycle.

I would not spend much time on getting the filter "just so" unless you are trying to do something like recover audio from a PWM signal. THEN, it is important to get the filter corner as close as you can to the PWM repetition frequency.

By the way, what is a "valid" filter depends, in huge measure, on the allowable voltage ripple in the output. This is NOT the filter passband ripple, but is the amplitude ripple you can see with an oscilloscope. It is synchronized with the PWM period. A side note: the voltage ripple is worst when the duty cycle is 50%.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

ka7ehk wrote:
The lower you make the filter corner frequency, the slower it is to step changes in PWM duty cycle.
Thank you for your help. This parameter is important to my application as it is not a repeating waveform and is very sensitive to rise and fall time.
ka7ehk wrote:
I would not spend much time on getting the filter "just so" unless you are trying to do something like recover audio from a PWM signal. THEN, it is important to get the filter corner as close as you can to the PWM repetition frequency.
My application is to translate mouse vectors, counts/mm, into XBox 360 Controller thumbstick deflection, 0v - 1.6v. The mouse streams 8-bit samples at 200 samples per second.

I am beginning to suspect that the equations listed above need to be reworked to calculate Fpwm. It is likely that this solution is not going to work for my application because Fpwm will be too large given desired rise/fall times (125 uS) and resolution (8 Bits).

Rick

I think it will work. You get a mouse report every 5ms, so you are 'sampling' mouse position at 200 hz and updating the pwm every 5ms, so if you have a 100hz 2 section lo pass rc filter, the x box will think you have your thumb on the lever.

Imagecraft compiler user

bobgardner wrote:
I think it will work. You get a mouse report every 5ms, so you are 'sampling' mouse position at 200 hz and updating the pwm every 5ms, so if you have a 100hz 2 section lo pass rc filter, the x box will think you have your thumb on the lever.
The circuit works when using a digital POT but I am evaluating PWM DAC design as an alternative. It requires precise translation to have the mouse feel natural.

I agree that the number of samples per second is not an issue. My concern when using a PWM DAC circuit is the amount of time it takes, after changing the PWM duty cycle, for the filter circuit to settle at the target voltage. It can't be too long or the mouse control will feel mushy and unresponsive.

In the worst case the translation requires changing PWM duty cycle from 0% to 100%. I assume the settle time is influenced by the RC filter values. Fast response requires lower RC time constant.

Is it possible to start with a target RC circuit, working the equations in reverse from my original example, to obtain a corner frequency, PWM period, and CPU clock? None of the references I've used discuss this issue at all. I feel like a babbling idiot.

Rick

Last Edited: Tue. Aug 18, 2009 - 10:28 AM

Turns out I'm not just uttering gibberish. There's a good article that explains the problem, and a complicated solution:

Fast-settling synchronous-PWM-DAC filter has almost no ripple

PWM-DAC design presents a big design problem: How do you adequately suppress the large ac-ripple component inevitably present in the switchâ€™s outputs? The ripple problem becomes especially severe when you use typical 16-bit microcontroller-PWM peripherals for DAC control; such high-resolution PWM functions usually have long cycles because of the large 216 countdown modulus of 16-bit timers and comparators. This situation results in ac-frequency components as inconveniently slow as 100 or 200 Hz. With such low ripple frequencies, if you employ enough ordinary analog lowpass filtering to suppress ripple to 16-bitâ€”that is, â€“96-dBâ€”noise levels, DAC settling can become a full second or more.

http://www.edn.com/index.asp?lay...

Still looking for the engineering references that would allow me to calculate DAC settling time for my simple RC filter. I'm still under the impression that worst case is 0% to 100% duty cycle. In this case (10% to 90%) rt = 2.2 * R * C.

Rick

Use a digital low pass filter (FIR)?
http://www.quickfiltertech.com/
Applications -> Reference Designs
For analog output, their Mojo designs use a codec or a simple analog low pass filter after a high frequency PWM DAC.

"Dare to be naïve." - Buckminster Fuller

rjburke377 wrote:
Still looking for the engineering references that would allow me to calculate DAC settling time for my simple RC filter. I'm still under the impression that worst case is 0% to 100% duty cycle. In this case (10% to 90%) rt = 2.2 * R * C.

The good old fashioned way would go along the following line (I may have omitted some parts, soldering 0603's for four hours instead of sleeping).

* Get impulse response of your RC filer.

* Construct a piecewise input signal with duty cycle DTa for t < tx and with duty cycle DTb for t >= tx. Setting tx = 0 might be a good idea.

* Laplace transform.

* Multiply signal and impulse response in the frequency domain. (multiplication of the Laplace transforms is equivalent to convolution in the time domain).

* Inverse Laplace transformation. This then gives the transfer function.

* Define a criteria for what constitutes settling (e.g. when the output for t >= ts is always within 99,9% of desired value -> settled). When doing so, take LSB of DAC into account. Assuming you want to get 1 LSB resolution then your criteria would be lower than the equivalent of the voltage the LSB of the DAC represents.

* Construct inequation from criteria and transfer function.

* Reorder inequation to get a function of time t (or maybe of delta_t = ts - tx).

* Find maximum of that function of time t (differentiate).

At that point you might consider that the lazy way - simulation - might have been faster to get a good enough answer.

Stealing Proteus doesn't make you an engineer.

ArnoldB wrote:

The good old fashioned way would go along the following line ...

At that point you might consider that the lazy way - simulation - might have been faster to get a good enough answer.

Arnold, you've given me a lot of information. I suspect I'll be googling your recipe for weeks trying to figure it out.

Yes, I am using multisym too ... which is how I noticed the long settling time with my first order RC filter.

Thank you for the feedback. Hope you are able to get some sleep.

Rick

gchapman wrote:
Use a digital low pass filter (FIR)?
http://www.quickfiltertech.com/
Applications -> Reference Designs
For analog output, their Mojo designs use a codec or a simple analog low pass filter after a high frequency PWM DAC.
Yes, seems like the same kind of solution as referenced earlier: filtering by combining a differential integrator with a sample-and-hold amplifier. Similar in that active components are used as a high-performance filter.

Good stuff for future reference but more than I need.

Rick

rjburke377 wrote:
Arnold, you've given me a lot of information.
Take it with a grain of salt.

There are things wrong in the description, e.g. the inverse Laplace transform of the multiplication doesn't give the transfer function but the output signal. The Laplace transform of the impulse response is the transfer function.

But after working through the night, having a busy day and then reading a response from an idiot called dual elsewhere I am not motivated to carefully check it and correct it.

Stealing Proteus doesn't make you an engineer.

When you yank the joystick over, the pwm goes to 100% and you want the volts to get there real fast. It takes five RC time constants for the cap to get charged up to 99%. I think we need a 100hz filter to track the 200 hz updates, so the time const is 10ms. 5 of those is 50ms (20hz). The volts will get to full scale 50ms after you yank the joystick. Good enough?

Imagecraft compiler user

Doesn't texas instruments have a good filter tool?

bobgardner wrote:
The volts will get to full scale 50ms after you yank the joystick. Good enough?

Hmmmm. 5t is too slow for the mouse-to-thumbstick translation (look up/down/left/right) where speed and precision reigns. This delay represents 2.5 screen frames. In a first person shooter this is an eternity.

Should be fine for triggers and left/right/backward/forward thumbstick movement. Working in my favor is that thumbstick and trigger voltage range is 0v - 1.6v and the PWM voltage is 5v. It should only take 1.8ms to reach 1.6v from 0v. I still think this is too slow for the mouse translation.

I'll prototype all six analog controls with PWM and see if my assumptions are correct. Thanks.

Rick

I've finally found the engineering formula for analyzing a PWM DAC circuit that uses a first order RC filter:

This equation models the natural and forced response of the RC circuit.

The capacitor's initial voltage at the beginning of each cycle is V0.

V is the applied voltage for the low portion, and high portion of the period. Therefore Vc(step) is applied twice for the period. Once for the low portion, and once for the high.

By repeating the calculation for multiple periods you can plot response time.

It would be interesting to shorten response time by ramping the PWM duty cycle to the target steady state, based on the voltage delta, instead of just setting duty cycle and then waiting for the RC circuit to converge to the steady state voltage.

Rick

Me thinks you are making this much harder than it really is.

Spice, such as the free LTSpice, does wonders for visualizing what happens.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

rjburke377 wrote:
I've finally found the engineering formula for analyzing a PWM DAC circuit that uses a first order RC filter:

This equation models the natural and forced response of the RC circuit.

The capacitor's initial voltage at the beginning of each cycle is V0.

V is the applied voltage for the low portion, and high portion of the period. Therefore Vc(step) is applied twice for the period. Once for the low portion, and once for the high.

By repeating the calculation for multiple periods you can plot response time.

It would be interesting to shorten response time by ramping the PWM duty cycle to the target steady state, based on the voltage delta, instead of just setting duty cycle and then waiting for the RC circuit to converge to the steady state voltage.

Rick

Some of my old signal processing is coming back to me...

You should be able to extend this by analysing for a pulse train, which is an impulse train** convolved with a unit pulse ( u(t) - u(t-k) ), where k is the length of the pulse, whereas the formula listed is for a single step response.

Unfortunately, without digging up some notes collecting dust in the back of my cupboard I can't really help much more - we did it in context of sampling theory and in particular, required filters for DACs before and after oversampling.

I'm glad those days are behind me! Until I actually need them...

** Wikipedia calls it a "Dirac Comb" http://en.wikipedia.org/wiki/Sam...

ka7ehk wrote:
Me thinks you are making this much harder than it really is.

Spice, such as the free LTSpice, does wonders for visualizing what happens.

Jim

I'm not certain what you mean by I'm making it harder than it really is. What's "it"?

LTspice IV is great. It did indeed help me visualize what happens. Thank you.

Using the Vc(step) equation in Excel I was able to duplicate the spice values and I can quickly analyse "what if" scenarios.

Rick

## Attachment(s):

My point is that there are some "rules of thumb" which rigorously apply to PWM filters, and don't require the iterative computation suggested by your post a couple of ones up.

For example:

For ANY lowpass filter, the average output IS the average of the PWM filter (possibly modified by gain and offset of the filter, if it is active).

For ANY lowpass filter, the peak-peak output amplitude is the highest when the duty cycle is 50% and falls to smoothly zero when the duty cycle is either 0% or 100%.

For ANY lowpass filter, the peak-peak amplitude decreases as the filter corner frequency is reduced relative to the PWM repetition frequency, For example, a 1 pole filter with a corner of 100Hz used with a 1KHz PWM will have the SAME peak-peak amplitude as a 1KHz filter used with a PWM running at 10KHz. In both cases, the filter corner is 1/10 of the PWM repetition frequency. But, using a 100Hz filter with a 10KHz PWM will result in a lower peak-peak amplitude than using a 1KHz filter with a 10KHz PWM.

For ANY lowpass filter, changing the PWM duty cycle in a step-wise manner results in a filter output in which the average changes exactly like a simple step input. That is, if, in a single PWM cycle, the duty cycle is changed from 10% to 90%, (while switching between 0 and Vcc) the output of the filter will rise in exactly the same way as if you had an input that step-wise rises from 0.1*Vcc to 0.9*Vcc.

For any lowpass filter, the higher the order with a given corner frequency, the lower the ripple (peak-peak amplitude).

None of these rules of thumb require any iterative computation. For that matter, they take almost no computation, at all.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

I looked at the Microchip appnote that John mentioned and I didn't realize that an R2R ladder has noticibly less harmonic distortion than a PWM with filter. Since my hearing is putzed and everything sounds like an AM radio to me, I doubt if I can test this, but I wanted to ask other's if this is noticible to them?

Smiley

Jim, thank you for helping me understand these principles. Fussing through this isn't hard ... just takes time. I can see that very soon I will be able to apply rules of thumb but not until I know what I'm doing.

ka7ehk wrote:

None of these rules of thumb require any iterative computation. For that matter, they take almost no computation, at all.

What rule do I use to figure out the settling time for a circuit at 50% duty cycle? If I've missed important values in this question then please supply useful defaults.

Rick

You want the visual feedback to be indistinguishable when comparing human digit on xbox joystick to avr sensing some voltage, adjusting the pwm, and feeding the voltage to the joystick input. I claim 50ms or less is visually undetectable. Thats 20 somethings a sec... fields, frames, whatever. I'd be surprised if the xbox responded to a step function on the joystick within one video frame... 30ms or so. If the mouse is reporting at 200hz, and the filter is half of that, 100hz or 10ms time const, it should settle to 99% of its avg value in 50ms, as I claimed in an earlier message. If the filter is 10hz, it will be a lot smoother. I'd also try it with a 1khz filter. It will have little 200hz wiggles in it, but there might be a window in the xbox program that smooths this out (defend against elcheapo noisy joysticks).

Imagecraft compiler user

bobgardner wrote:
You want the visual feedback to be indistinguishable when comparing human digit on xbox joystick to avr sensing some voltage, adjusting the pwm, and feeding the voltage to the joystick input. I claim 50ms or less is visually undetectable. Thats 20 somethings a sec... fields, frames, whatever.
Bob, for old guys like me you are probably right: response time doesn't matter. :wink:

As an experiment I am going to measure the movement rate of a player and rotation rate of the POV camera for different voltages. I've attached a video capture card to my system so the PC can send commands to the controller and can analyse the response using video.

Your brain will compensate for lag by anticipating intersection of player and reticule positions. Too much lag, though, will be frustrating when having to spin around.

I had previously tried an update rate of 75ms but couldn't get a headshot because the reticule had many blind spots at this rate. My assumption is that 50ms may be no better. Depends on the amount of voltage/deflection applied to the thumbstick by the PWM DAC.

The MCP42010 version of the circuit works really well so I know at least one solution is good.

bobgardner wrote:
I'd be surprised if the xbox responded to a step function on the joystick within one video frame... 30ms or so.
Then get ready to be surprised. :-) I measured round trip delay from a PC to controller, to XBox 360, and back to PC at 16ms.

Frame rate is 60 Hz on my system.

bobgardner wrote:
If the mouse is reporting at 200hz, and the filter is half of that, 100hz or 10ms time const, it should settle to 99% of its avg value in 50ms, as I claimed in an earlier message. If the filter is 10hz, it will be a lot smoother. I'd also try it with a 1khz filter. It will have little 200hz wiggles in it, but there might be a window in the xbox program that smooths this out (defend against elcheapo noisy joysticks).
I'm using the LTspice program that Jim mentioned earlier to play with different filter values. I am convinced the technology will work.

The XNA API distorts the idle voltages in the middle of the range, and clips 20% of the upper and lower voltages. I have not seen smoothing but it does apply distortion (i.e., a dead-zone in the middle of the range).

Rick

Last Edited: Thu. Sep 3, 2009 - 08:42 PM

The rule of thumb appears to be that PWM for any duty cycle settles in 4 - 5 Ï„ (when starting from 0 v).

I may be able to achieve my goal of low latency by using Fast PWM (PLL capable chips). Are there any gotchas when using 64MHz PLL source, with 8 bits resolution? I'm only going to change the duty cycle every 5ms or so.

```F(source)       64,000,000  Hz
Resolution      8           Bits
F(pwm)          250,000     Hz
A(stop)         56          Db
Fc              399         Hz
R               399         Ohms
RC              399         us
```

Rick

The settling time is determined only by the time constant (or corner frequency) of the filter (if it is a one-pole filter). It does not depend on the magnitude of the PWM duty cycle change. It gets a lot more complex with two or more poles (complex in several senses).

The measure often used is "rise time". This is the time it takes a step response to rise 10% of the way above the initial value to the 90% level. That is, if the step DELTA is V and the initial value is V0, , it is the time from the Vo+0.1*V level to the V0+0.9*V level.

The definition does not measure from V0 because a step that has gone through several low=pass filters has no sharp definition of "starting point". For a single pole filter, rise time is 2.2*R*C.

Settling time is a lot more ambiguous. It is often used in association with analog signal processing ahead of an A-D converter. There, one is often interested in how long it takes to be within one bit of the final value (since, once it reaches this point, the ADC will no longer change).

In other words, there is no standard definition of settling time. It measures how long it takes to reach some error band around the final stable value.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

Jim, thank you so much for mentoring me through these concepts. Your efforts are very much appreciated.

Rick

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

One additional rule of thumb to consider:

If a PWM signal is modulated (to create a lower frequency analog signal), then the lowpass smoothing filter affects the analog signal in EXACTLY the same way as if that signal were the direct input to the filter.

What this tells you: the PWM repetition frequency and the low frequency signal must be well separated for accurate reconstruction. Take the example of a simple RC lowpass filter. AT the corner, the filter has an attenuation of 3db. At half the corner frequency, the attenuation is around 1db (this may be a LITTLE off). At twice the corner frequency, the attenuation is about 6db (-6db gain). Thus, if you were to use a 2KHz PWM to create a 500Hz signal and used a 1KHz lowpass, the 500Hz reconstruction would NOT be full amplitude; it would low by about 1db. The PWM would not be smoothed out "much" because the fundamental is reduced by only 6db. Remember that -10db means a gain of 0.1 so -6db is a gain of 0.25, more or less.

This will give you some guidance when trying to choose a filter to reconstruct a low frequency signal from a PWM.

Be aware that the more poles the filter has, the closer you can get the low frequency signal to the PWM frequency for a given amount of ripple.

Here, "ripple" refers to the "leakage" of the PWM signal repetition frequency into the filter output.

Hope this does not confuse too much...

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

ka7ehk wrote:

Hope this does not confuse too much...
Jim

No, in fact the opposite.

For my circuit the PWM signal is being modulated at 100 or 200 Hz depending on configuration. The PWM repetition frequency and the low frequency signal are orders of magnitude apart. My application is quite simple in that respect.

With a 400Hz corner frequency I will be attenuating the modulated signal at most 1 db which is not significant compared to all of the other sources of error.

Very good!

Rick

Last Edited: Sat. Sep 5, 2009 - 02:27 AM

I developed many of these rules of thumb about a year ago when I was working on a tutorial on PWM filtering for programmers. I got abandoned. Sounds like I need to resurrect it and complete it.

There were several others that were useful in estimating the ripple amplitude. One was the fact that ripple is largest at 50% duty cycle. This means that you don't have to check other duty cycles, that is where it is largest.

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

ka7ehk wrote:
I was working on a tutorial on PWM filtering for programmers. It got abandoned. Sounds like I need to resurrect it and complete it.

Jim

Most source materials are too trivial, or too academic. Although not useless, they don't convey the experience and practical instruction that you've provided here in a few posts.

If the number of views is any indication, this is a popular topic. A tutorial would be appreciated.

Thank you,
Rick

If your graphics card is showing 60 frames a sec (16.67ms) and your video captures fields at that rate, and they are somehow synchronized, you might be able to detect if something moves on the next field after moving the eyepoint. I think you need an a/d converter on a joystick. Then you can grab positions faster than the 200hz the mouse gives. You might be able to speed up the mouse baudrate... microsoft mouse send 3 bytes per report... logitech/mouse systems sends 5 bytes per report. The mouse sends 2 xy locs per report, so you can calc the delta between postions on ea report to get vel, and diff the vel between reports to get accel. This lets you 'toss' the cursor across the screen (ballistically?) by reading the accel of the mouse position. Silver Bullet. Adversaries will be using mouse to give position. They will be eliminated.

Imagecraft compiler user

bobgardner wrote:
If your graphics card is showing 60 frames a sec (16.67ms) and your video captures fields at that rate, and they are somehow synchronized, you might be able to detect if something moves on the next field after moving the eyepoint.

Hi Bob. You're jumping ahead! Without video the translation is as follows:

Open the picture in a new screen to get a larger view.

The reason I need fast DAC conversion when translating mouse events is because I must translate the mouse X/Y vector into a thumbstick deflection for a specific time period before the next mouse report.

The mouse X/Y rate is 100 or 200 samples per second for regular mice and is measured in 8 counts / mm. The simplest mechanism is to translate the mouse X/Y vector into thumbstick voltage, and to apply that voltage for approx. 5ms (ie, until the next mouse report). You can cheat a little by using a larger deflection for a shorter delta time. You can hide a slow DAC rise/fall time of maybe 20% of the sample frquency.

If the DAC requires 50 ms rise time, as mentioned previously, then what to do with the accumulated mouse reports? Add them then apply a large deflection to catch up?

With a PLL 64 MHz source frequency the PWM DAC can handle mouse reports in real time. Rise time is less than 1 ms. I prefer this.

For now, I'd like to use the camera for calibration only.
1. I'd like to know how many screen elements the reticule moves for a given thumbstick deflection over a given time period.
2. I'd also like to measure how fast a player moves for a given thumbstick defection for a given time period.

Rick

Last Edited: Sat. Sep 5, 2009 - 02:24 PM

OK, so if you can extract the velocity component from the mouse movement, you can 'pre distort' the pwm to charge up the cap faster... you will be adding a little overshoot to the step function. Like boosting the bass to overcome an lf rolloff.

Imagecraft compiler user

bobgardner wrote:
OK, so if you can extract the velocity component from the mouse movement, you can 'pre distort' the pwm to charge up the cap faster... you will be adding a little overshoot to the step function. Like boosting the bass to overcome an lf rolloff.

Yes, that will work. A boosting table for course adjustment based on voltage delta and a fine adjustment table for steady state. Thank you for the tip.

Combining the PLL 64 MHz source frequency with this technique should rival the speed and accuracy of the MCP42010 8-Bit Digital Pot.

Rick

How to calculate the ASTOP required minimum ripple for low pass filter??  For eg: I have given 50kHz 10V input and the Output is 5V.  R and C value is 10K and 10uf.

DS.G wrote:

How to calculate the ASTOP required minimum ripple for low pass filter??  For eg: I have given 50kHz 10V input and the Output is 5V.  R and C value is 10K and 10uf.

Are we talking a simple RC filter here? If so, why the 5V output, a 'normal' filter has no gain and no loss in the pass band? Also, why did you pick those values?

Is this for PWM? If so, what settling time can you accept?

[E2A]

What is the load on the filer?

Probably the quickest way to see what is what is to simulate the filter in one of the free online simulation tools.

'This forum helps those who help themselves.'

pragmatic  adjective dealing with things sensibly and realistically in a way that is based on practical rather than theoretical consideration.

Last Edited: Wed. Nov 8, 2017 - 11:30 AM

West Coast Jim KA7EHK has / had a tutorial on PWM LPF's, IIRC, perhaps he can post the link to it.

JC

Last Edited: Thu. Nov 9, 2017 - 12:16 AM

You can find the tutorial here:

PWM Filters.pdf

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

Yes, PWM input with 50% duty cycle to achieve 5V.   With this I want to know the formula to calculate the ASTOP required minimum ripple and the settling time is 5ms.

I think my tutorial has an explicit formula for that specific case. Well, not ASTOP because that is a function of the order of the filter AND the design (butterworth, elliptical, and so forth). I do not know of any design formula that considers settling time. Both ripple and settling time are a function of the PWM repetition frequency.

It is an important case because ripple is maximum at 50% duty cycle (just as it is minimum at 0% and 100% duty cycle).

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net