This applies to the datasheet as I obtained it here. I've not checked whether this appears in the other non-suffix datasheets.
There seems to be an error in the example of the operation of the ADC on page 323:
ADMUX = 0xED (ADC3 - ADC2, 10× gain, 2.56V reference, left adjusted result)
Voltage on ADC3 is 300 mV, voltage on ADC2 is 500 mV.
ADCR = 512 × 10 × (300 - 500) / 2560 = -400 = 0x270
ADCL will thus read 0x00, and ADCH will read 0x9C.
Writing zero to ADLAR right adjusts the result: ADCL = 0x70, ADCH = 0x02.
The first line sets the ADMUX register to 0b11101101; this means REFS[1:0] = 11, ADLAR = 1, and MUX[3:0] = 1101. According to the register description, this means the reference is set to the internal 1.1V reference, whereas the example states this should be a 2.56V reference which doesn't seem to be an option at all, and there is no mention of a 2.56V reference being available within the device when the ADC operation is described. Furthermore, the setting MUX[3:0] = 1101 is listed ominously as 'Reserved' - there is certainly no option for ADC3 - ADC2 with a 10x gain.
I haven't tried this example out, so I don't know if it's completely wrong (and intended for another device), or if the undocumented 'Reserved' setting for MUX[3:0] will actually trigger this behaviour. I'm going to contact Atmel/Microchip when I get a change and ask what's going on here, but I was wondering if anyone else had noticed this or had any explanation for it?