AT32UC3B Sync. operation of USART maximum Baudrate possible

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Hey guys,

I am new to the AT32UC3B and i have a small question regarding the possible maximal baudrate realizable using the USART module in sync. mode. I scanned through all relevant datasheets and i also consulted google but i could not find any answere for now...

I would like to use the USART in slave mode (so i am going to apply an external CLK frequency). According to the datasheet, the maximum external CLK frequency applicable has to be at least 4.5 lower than CLK_USART. But i never find any limit on how high CLK_USART might be. CLK_USART is supplied by a generic clock source and thus i could set a PLL up to 240 MHz...

Furthermore, i found in the Errata that in such a configuration, the external CLK frequency possible is not only CLK_USART/4.5 but has to be CLK_USART/9.
Is this still true or is there any other workaround available for this limitation? Because if not, this would mean that the sync. mode of the USART is completely worthless, since in the async. mode you could realize CLK_USART/8 which is faster...

 

Thanks in advance!!

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CLK_USARTn comes from the PBA clock (which has a 60 MHz upper limit).