Xmega, sleep and TWI/I2C

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Hi,

we've had some troubles with TWI/I2C after waking up from sleep with the Xmega256A3. Instead of digging into the details of TWI/I2C we've decided to use the supplied twi_master_driver from Atmel attached to AVR1308 application note.

The problem is one or a few failed TWI transactions just after waking up from sleep. On the I2C-bus connected to the XMega we have a few potentiometers, a thermometer and an RTC. The XMega acts as the only master on the bus.

We use the sleep functions found in AVRLIBC:

{code for turning of VCC to all I2C connected devices}
set_sleep_mode(SLEEP_MODE_PWR_DOWN);
sleep_enable();
sleep_cpu();
{code for turning on VCC to all I2C connected devices}

The XMega as woken from sleep by the RTC which sets a pin high. After the XMega is woken from sleep, we want to set a value on one of the potentiometers, but this fails. For some reason, the TWI-transaction result is TWIM_RESULT_NACK_RECEIVED instead of TWIM_RESULT_OK in the first transaction. After that everything seems to work again.

Have we missed anything here? Is there any known issues with the XMega, sleep and TWI? Do we need to reset the TWI of clear any flags after waking from sleep?

Best regards
Fredrik

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zetter wrote:
Is there any known issues with the XMega, sleep and TWI?

Yes, there are some issues with TWI and RTC value after sleep. See errata section of doc8068.pdf

Ozhan KD
Knowledge is POWER

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electronic.designer: thanks for the quick response. Since my post i've noticed that I can read and write to the RTC directly after sleep which makes me think that the XMega might not the be cause of the problems. The issue arises when talking to the potentiometers or the thermometer.

Maybe one of these units have gotten stuck in a wierd state? I've read in different forums that there are a universal reset sequence for all I2C, TWI and SMBus units:

Quote:

After an interruption in protocol, power loss or system reset, any 2-wire part can be reset by following these steps:
(a) Clock up to 9 cycles,
(b) look for SDA high in each cycle while SCL is high and then
(c) create a start condition as SDA is high.

Has anyone had any experience with this? And SW-examples to do this on the XMega?

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The errata states the following issues:
• TWI Transmit collision flag not cleared on repeated start
• Clearing TWI Stop Interrupt Flag may lock the bus
• TWI START condition at bus timeout will cause transaction to be dropped
• TWI Data Interrupt Flag (DIF) erroneously read as set

I'm not sure if any of these could cause our issues.

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We ended up switching to Peter Fleurys I2C lib which seems to have solved the problem.