if I use the hardware SPI , I see an unexpected long delay between
2 consecutive bytes.I put one byte into SPI data register, then query the 'SPI transmit ready flag' in a loop , and transmit the next byte etc.
This is the normal way to do it , I think.
The delay (or gap you see on an oscilloscope) between two bytes should only be
some clock cycles (in my case 8 MHz ) for the 3 or so commands between 2
byte transmissions. But the delay is much bigger, about the same time you
need to transmit one byte with 2 MHz SPI-Clock ( abt. 8*(2*4) CPU-Cycles
= 36 clock cpu clock cycles ).
I also saw postings in other AVR-related groups about this phenomen , but no
solutions or explanations.
My question: Does anyone know why this delay appears? Or is it only a problem
of my special application, and other SPI-Implementations run without this delay?