megaAVR 0-series

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http://packs.download.atmel.com/#collapse-Atmel-ATmega-DFP-pdsc

1.2.203 (2017-12-15)

Corrected register names for ATmega4809, ATmega4808, ATmega3209 and ATmega3208.

1.2.150

...

Added ATmega4809, ATmega4808, ATmega3209 and ATmega3208.

Two-level (plus NMI) interrupt controller

32KB and 48KB flash (likely unified memory)

28/32 pins for 8, 48 pins for 9

 

"Dare to be naïve." - Buckminster Fuller

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"Dare to be naïve." - Buckminster Fuller

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oooh...  Looks like there might even be a DIP-28 !

 

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Certainly gives the impression that the ATtiny's (xtiny's) are limiting out at 16KB and that 32KB, and larger?, will be classified as ATMega, though that conflicts with what Jan (je_ruud) wrote here.  It would be nice to see an actual roadmap!  Microchip|Atmel, are you listening?

 

Seems to also confirm comments in other threads, made by Microchip|Atmel personnel, that indicated there would be no Xplained Pro based on an ATtiny1616 as they are most likely going to produce an Xplained Pro 32xx or 42xx instead. 

 

EDIT: je_ruud

 

"void transmigratus(void) {transmigratus();} // recursio infinitus" - larryvc

"It's much more practical to rely on the processing powers of the real debugger, i.e. the one between the keyboard and chair." - JW wek3

"When you arise in the morning think of what a privilege it is to be alive: to breathe, to think, to enjoy, to love." -  Marcus Aurelius

"Make XMEGA Great Again!"  - Greg Muth

Last Edited: Sun. Dec 31, 2017 - 05:14 PM
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So, 3 levels of interrupt priority now - nice!

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Two years ago the plans were completely different (, and we also had other owners...). Earth spins, plans change and we just have to compensate and make the best out of it.

 

Currently it seems to me (Marketing people are rather unpredictable at times. Or predictably unpredictable...) that what differs the new tiny's from the new mega's is pin count. But you won't find tiny's with >32kb flash. (.. ... Yet? Marketing, you know.)

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je_ruud wrote:
..

Currently it seems to me (Marketing people are rather unpredictable at times. Or predictably unpredictable...) that what differs the new tiny's from the new mega's is pin count. But you won't find tiny's with >32kb flash. (.. ... Yet? Marketing, you know.)

I'll go with your "predictably unpredictable" assessment.  Guess we will just have to wait and see what pans out.

"void transmigratus(void) {transmigratus();} // recursio infinitus" - larryvc

"It's much more practical to rely on the processing powers of the real debugger, i.e. the one between the keyboard and chair." - JW wek3

"When you arise in the morning think of what a privilege it is to be alive: to breathe, to think, to enjoy, to love." -  Marcus Aurelius

"Make XMEGA Great Again!"  - Greg Muth

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Or, maybe, what pins out?

 

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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Microchip

AN2515 Low-Power Techniques

http://ww1.microchip.com/downloads/en/appnotes/00002515b.pdf

(page 17)

10. Revision History

B

01/2018

Added some new sections:

• tinyAVR 0-series

• megaAVR 0-series

• Execution of the Sleep Instruction and Shared Variables Between ISR and Main

via https://www.microchip.com/search/searchapp/searchhome.aspx?q=atmega3209&resperpage=50&id=2

 

bits of PRR moved to each peripheral (p.7)

additional BOD mode (p.15)

 

"Dare to be naïve." - Buckminster Fuller

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Microchip Technology Inc

Microchip

AN2633

Precise, Ultra-Low-Power Timing using Periodic Enabling of the 32.768 kHz External Crystal Oscillator for Recalibration of the ULP Internal Oscillator

01/30/2018

http://www.microchip.com/wwwappnotes/appnotes.aspx?appnote=jp604346

Microchip Technology Inc

Microchip

AN2634

Bootloader for tinyAVR 0- and 1-series, and megaAVR 0-series

by Egil Rotevatn

02/05/2018

http://www.microchip.com/wwwappnotes/appnotes.aspx?appnote=en604508

 

"Dare to be naïve." - Buckminster Fuller

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Microchip Technology Inc

Microchip

ATmega4809 Xplained Pro Schematics

http://ww1.microchip.com/downloads/en/devicedoc/atmega4809_xplained_pro_schematics.pdf (5.6MB)

via

Microchip Technology Inc

Microchip

Schematics

http://www.microchip.com/doclisting/techdoc.aspx?type=schematics

Search by: pull-down menu, select Document Title

enter ATmega4809

Search

engineering sample

An Xplained Pro that can power the target MCU at 5V (is that a first?)

Level converters!  Thank you!

ATECC508A cryptographic authenticator (ATECC608A adds AES-128)

3 Xplained Pro headers

1 mikroBUSTM header

32KHz crystal (Kyocera ST3215SB32768C0HPWBB)

 


http://www.microchip.com/wwwproducts/en/atecc508a

http://www.microchip.com/wwwproducts/en/atecc608a

Mouser Electronics

AVX / Kyocera

Crystals SMD 32.768kHz Tuning Forks 7pF

https://www.mouser.com/ProductDetail/AVX-Kyocera/ST3215SB32768C0HPWBB?qs=%2fha2pyFaduh8oCrdFLUv8Ccy3mfYtgQAHuqnoJP9i3zMn1Xvp%2fvrd0H7ZVNGPxY0

 

"Dare to be naïve." - Buckminster Fuller

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From iom4808.h:

#define MAPPED_EEPROM_START     (EEPROM_START)
#define MAPPED_EEPROM_SIZE      (EEPROM_SIZE)
#define MAPPED_EEPROM_PAGE_SIZE (EEPROM_PAGE_SIZE)
#define MAPPED_EEPROM_END       (MAPPED_EEPROM_START + MAPPED_EEPROM_SIZE - 1)

#define FUSES_START     (0x1280)
#define FUSES_SIZE      (10)
#define FUSES_PAGE_SIZE (64)
#define FUSES_END       (FUSES_START + FUSES_SIZE - 1)

#define INTERNAL_SRAM_START     (0x2800)
#define INTERNAL_SRAM_SIZE      (6144)
#define INTERNAL_SRAM_PAGE_SIZE (0)
#define INTERNAL_SRAM_END       (INTERNAL_SRAM_START + INTERNAL_SRAM_SIZE - 1)

#define IO_START     (0x0000)
#define IO_SIZE      (4352)
#define IO_PAGE_SIZE (0)
#define IO_END       (IO_START + IO_SIZE - 1)

#define LOCKBITS_START     (0x128A)
#define LOCKBITS_SIZE      (1)
#define LOCKBITS_PAGE_SIZE (64)
#define LOCKBITS_END       (LOCKBITS_START + LOCKBITS_SIZE - 1)

#define MAPPED_PROGMEM_START     (0x4000)
#define MAPPED_PROGMEM_SIZE      (49152)
#define MAPPED_PROGMEM_PAGE_SIZE (128)
#define MAPPED_PROGMEM_END       (MAPPED_PROGMEM_START + MAPPED_PROGMEM_SIZE - 1

 

Hmm, memory mapped FLASH.

Greg Muth

Portland, OR, US

Atmel Studio 7.0 on Windows 10

Xplained/Pro/Mini Boards mostly

 

 

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So you can get an explained pro, lots of app notes but no datasheet?? surprise

 

...and I would be the first one to put my hand up for a board in case there is a giveaway..... devil if I can get a datasheet of course.

John Samperi

Ampertronics Pty. Ltd.

www.ampertronics.com.au

* Electronic Design * Custom Products * Contract Assembly

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I've looked at the schematic. 48pin LQFP 0.5mm pitch, 41 i/o (wow!), at least 3 uarts .... (I always need uarts...).

48K flash all mapped to data space is nice too. 6K ram is also a pleasant surprise.

 

I have a feeling that Microchip with these new tiny and mega family wants to keep the architecture in the 64K limit.

Personally, I would do that the same. It's natural (and simpler) to have the 8bitters in max 64K range.

And for anything else, there is always cortex-m.

Anyway, it's a very pleasant surprise to see the avr architecture still actively developed, even if it will be kept in the 64K range smiley

 

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rammon wrote:
It's natural (and simpler) to have the 8bitters in max 64K range.

And for anything else, there is always cortex-m.

And in-between are 16bitters.

It's been said that 16 bits is a sweet spot (code density, classic C int)

XMEGA was advertised as 8/16b; XMEGA AVR have a 24b address space.

AVR16 anyone?

Merge the AVR and PIC24 camps?  (best of both)

 

PIC32 can compete against arm Cortex-M.

A concern is the sale of MIPS.

 

Imagination Technologies

Completion of sale of MIPS

25th October 2017

https://www.imgtec.com/news/press-release/completion-of-sale-of-mips/

http://www.microchip.com/forums/FindPost/1023282 by wdy

(post #12)

...

How else would the evolution be kept if everybody jumped on the hyped ARM bandwagon?
...

Eggs in two baskets.

 

Edits: link target, #12

 

"Dare to be naïve." - Buckminster Fuller

Last Edited: Thu. Feb 8, 2018 - 12:51 PM
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They are also defined in current avrdude.conf, for example:

 

#------------------------------------------------------------
# ATmega4809
#------------------------------------------------------------

part parent    ".avr8x_mega"
    id        = "m4809";
    desc      = "ATmega4809";
    signature = 0x1E 0x96 0x51;

    memory "flash"
        size      = 0xC000;
        offset    = 0x4000;
        page_size = 0x80;
        readsize  = 0x100;
    ;

    memory "eeprom"
        size      = 0x100;
        offset    = 0x1400;
        page_size = 0x40;
        readsize  = 0x100;
    ;
;

 

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gchapman wrote:

rammon wrote:
It's natural (and simpler) to have the 8bitters in max 64K range.

And for anything else, there is always cortex-m.

And in-between are 16bitters.

It's been said that 16 bits is a sweet spot (code density, classic C int)

XMEGA was advertised as 8/16b; XMEGA AVR have a 24b address space.

AVR16 anyone?

Merge the AVR and PIC24 camps?  (best of both)

 

PIC32 can compete against arm Cortex-M.

A concern is the sale of MIPS.

 

Imagination Technologies

Completion of sale of MIPS

25th October 2017

https://www.imgtec.com/news/press-release/completion-of-sale-of-mips/

http://www.microchip.com/forums/FindPost/1023282 by wdy

(post #12)

...

How else would the evolution be kept if everybody jumped on the hyped ARM bandwagon?
...

Eggs in two baskets.

 

Edits: link target, #12

 

 

Modern 8bitters are a good deal 16bitters as well.

16bit is hard to justify without going beyond the 64K space. But then, the easier way is just 32bit.

In my view, a true in-between 16bitter would have 16bit registers and 32bit address range with register pairs as indexes. But these days it seems that just a plain 32bit cpu may be simpler.

 

Cortex-m was just an example. I'm sure one can come with a better 32bit cpu (for example, a CISC one).

Competition.